MM74C74 D-Type Flip-Flop Datasheet

MM74C74 Datasheet, PDF, Equivalent


Part Number

MM74C74

Description

Dual D-Type Flip-Flop

Manufacture

Fairchild

Total Page 7 Pages
Datasheet
Download MM74C74 Datasheet


MM74C74
October 1987
Revised January 1999
MM74C74
Dual D-Type Flip-Flop
General Description
The MM74C74 dual D-type flip-flop is a monolithic comple-
mentary MOS (CMOS) integrated circuit constructed with
N- and P-channel enhancement transistors. Each flip-flop
has independent data, preset, clear and clock inputs and Q
and Q outputs. The logic level present at the data input is
transferred to the output during the positive going transition
of the clock pulse. Preset or clear is independent of the
clock and accomplished by a low level at the preset or clear
input.
Features
s Supply voltage range: 3V to 15V
s Tenth power TTL compatible: Drive 2 LPT2L loads
s High noise immunity: 0.45 VCC (typ.)
s Low power: 50 nW (typ.)
s Medium speed operation: 10 MHz (typ.) with 10V
supply
Applications
• Automotive
• Data terminals
• Instrumentation
• Medical electronics
• Alarm system
• Industrial electronics
• Remote metering
• Computers
Ordering Code:
Order Number Package Number
Package Description
MM74C74M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
MM74C74N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Truth Table
Pin Assignments for DIP and SOIC
Preset
0
Clear
0
Qn
0
Qn
0
0110
1001
1 1 Qn (Note 1) Qn (Note 1)
Note 1: No change in output from previous state.
Note: A logic “0” on clear sets Q to logic “0”.
A logic “0” on preset sets Q to logic “1”.
Top View
© 1999 Fairchild Semiconductor Corporation DS005885.prf
www.fairchildsemi.com

MM74C74
Logic Diagram
www.fairchildsemi.com
2


Features MM74C74 Dual D-Type Flip-Flop October 1 987 Revised January 1999 MM74C74 Dual D-Type Flip-Flop General Description Th e MM74C74 dual D-type flip-flop is a mo nolithic complementary MOS (CMOS) integ rated circuit constructed with N- and P -channel enhancement transistors. Each flip-flop has independent data, preset, clear and clock inputs and Q and Q out puts. The logic level present at the da ta input is transferred to the output d uring the positive going transition of the clock pulse. Preset or clear is ind ependent of the clock and accomplished by a low level at the preset or clear i nput. s High noise immunity: 0.45 VCC ( typ.) s Low power: 50 nW (typ.) s Mediu m speed operation: 10 MHz (typ.) with 1 0V supply Applications • Automotive • Data terminals • Instrumentation • Medical electronics • Alarm syste m Features s Supply voltage range: 3V to 15V s Tenth power TTL compatible: Dr ive 2 LPT2L loads • Industrial elect ronics • Remote metering • Computers Ordering Code: Order Number MM74C74M .
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