MM74C901 TTL Buffer Datasheet

MM74C901 Datasheet, PDF, Equivalent


Part Number

MM74C901

Description

Hex Inverting TTL Buffer

Manufacture

Fairchild

Total Page 6 Pages
Datasheet
Download MM74C901 Datasheet


MM74C901
October 1987
Revised January 1999
MM74C901 • MM74C902
Hex Inverting TTL Buffer •
Hex Non-Inverting TTL Buffer
General Description
The MM74C901 and MM74C902 hex buffers employ com-
plementary MOS to achieve wide supply operating range,
low power consumption, and high noise immunity. These
buffers provide direct interface from PMOS into CMOS or
TTL and direct interface from CMOS to TTL or CMOS
operating at a reduced VCC supply.
Features
s Wide supply voltage range: 3.0V to 15V
s Guaranteed noise margin: 1.0V
s High noise immunity: 0.45 VCC (typ.)
s TTL compatibility: Fan out of 2 driving standard TTL
Ordering Code:
Order Number Package Number
Package Description
MM74C901M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
MM74C901N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.300” Wide
MM74C902M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
MM74C902N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
Pin Assignments for DIP and SOIC
MM74C901
MM74C902
Top View
Logic Diagrams
MM74C901
CMOS to TTL Inverting Buffer
Top View
MM74C902
CMOS to TTL Buffer
© 1999 Fairchild Semiconductor Corporation DS005909.prf
www.fairchildsemi.com

MM74C901
Absolute Maximum Ratings(Note 1)
Voltage at Any Pin
Voltage at Any Input Pin
MM74C901
MM74C902
0.3V to VCC + 0.3V
0.3V to +15V
0.3V to +15V
Storage Temperature Range (TS)
Power Dissipation (PD)
Dual-In-Line
Small Outline
Operating Temperature Range (TA)
MM74C901, MM74C902,
65°C to +150°C
700 mW
500 mW
40°C to +85°C
Operating VCC Range
Absolute Maximum VCC
Lead Temperature (TL)
(Soldering, 10 seconds)
3.0V to 15V
18V
260°C
Note 1: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. Except for “Operating Tempera-
ture Range” they are not meant to imply that the devices should be oper-
ated at these limits. The table of “Electrical Characteristics” provides
conditions for actual device operation.
DC Electrical Characteristics
Min/Max limits apply across temperature range unless otherwise noted
Symbol
Parameter
Conditions
CMOS TO CMOS
V IN(1)
Logical “1” Input Voltage
V IN(0)
Logical “0” Input Voltage
V OUT(1) Logical “1” Output Voltage
V OUT(0) Logical “0” Output Voltage
I IN(1)
Logical “1” Input Current
I IN(0)
Logical “0” Input Current
I CC Supply Current
TTL TO CMOS
V CC = 5.0V
V CC = 10V
V CC = 5.0V
V CC = 10V
V CC = 5.0V, IO = −10 µA
V CC = 10V, IO = −10 µA
V CC = 5.0V
V CC = 10V
V CC = 15V, VIN = 15V
V CC = 15V, VIN = 0V
V CC = 15V
V IN(1)
Logical “1” Input Voltage
V IN(0)
Logical “0” Input Voltage
CMOS TO TTL
V CC = 4.75V
V CC = 4.75V
V IN(1)
Logical “1” Input Voltage
MM74C901
V CC = 4.75V
MM74C902
V CC = 4.75V
V IN(0)
Logical “0” Input Voltage
MM74C901
V CC = 4.75V
MM74C902
V CC = 4.75V
V OUT(1) Logical “1” Output Voltage
V CC = 4.75V, IO = −800 µA
V OUT(0) Logical “0” Output Voltage
MM74C901
V CC = 4.75V, IO = 2.6 mA
MM74C902
V CC = 4.75V, IO = 3.2 mA
OUTPUT DRIVE (See Family Characteristics Data Sheet) (Short Circuit Current)
(MM74C901)
I SOURCE
Output Source Current
(P-Channel)
I SOURCE
Output Source Current
(P-Channel)
I SINK
Output Sink Current
(N-Channel)
I SINK
Output Sink Current
(N-Channel)
(MM74C902)
V CC = 5.0V, VOUT = 0V
T A = 25°C, VIN = 0V
V CC = 10V, VOUT = 0V
T A = 25°C, VIN = 0V
V CC = 5.0V, VOUT = VCC
T A = 25°C, VIN = VCC
V CC = 5.0V, VOUT = 0.4V
T A = 25°C, VIN = VCC
Min Typ
3.5
8.0
4.5
9.0
0.005
1.0 0.005
0.05
V CC 1.5
Max
1.5
2.0
0.5
1.0
1.0
15
0.8
Units
V
V
V
V
V
V
V
V
µA
µA
µA
V
V
4.25
V CC 1.5
2.4
V
V
1.0 V
1.5 V
V
0.4 V
0.4 V
5.0 mA
20 mA
9.0 mA
3.8 mA
www.fairchildsemi.com
2


Features MM74C901 • MM74C902 Hex Inverting TTL Buffer • Hex Non-Inverting TTL Buffer October 1987 Revised January 1999 MM 74C901 • MM74C902 Hex Inverting TTL B uffer • Hex Non-Inverting TTL Buffer General Description The MM74C901 and MM 74C902 hex buffers employ complementary MOS to achieve wide supply operating r ange, low power consumption, and high n oise immunity. These buffers provide di rect interface from PMOS into CMOS or T TL and direct interface from CMOS to TT L or CMOS operating at a reduced VCC su pply. Features s Wide supply voltage r ange: s Guaranteed noise margin: s High noise immunity: 3.0V to 15V 1.0V 0.45 VCC (typ.) s TTL compatibility: Fan ou t of 2 driving standard TTL Ordering C ode: Order Number MM74C901M MM74C901N M M74C902M MM74C902N Package Number M14A N14A M14A N14A Package Description 14-L ead Small Outline Integrated Circuit (S OIC), JEDEC MS-120, 0.150” Narrow 14- Lead Plastic Dual-In-Line Package (PDIP ), JEDEC MS-011, 0.300” Wide 14-Lead Small Outline Integrated Circuit (SO.
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