MM74C93 Binary Counter Datasheet

MM74C93 Datasheet, PDF, Equivalent


Part Number

MM74C93

Description

4-Bit Decade Counter 4-Bit Binary Counter

Manufacture

Fairchild

Total Page 6 Pages
Datasheet
Download MM74C93 Datasheet


MM74C93
October 1987
Revised January 2004
MM74C93
4-Bit Binary CounterGeneral Description
mThe MM74C93 binary counter and complementary MOS
(CMOS) integrated circuits constructed with N- and P-
ochannel enhancement mode transistors. The 4-bit binary
counter can be reset to zero by applying high logic level on
. cinputs R01 and R02, and a separate flip-flop on the A-bit
enables the user to operate it as a divide-by-2, -8, or -16
divider. Counting occurs on the negative going edge of the
input pulse.
All inputs are protected against static discharge damage.
Features
s Wide supply voltage range: 3V to 15V
s Guaranteed noise margin: 1V
s High noise immunity: 0.45 VCC (typ.)
s Low power compatibility:
Fan out of 2 TTL driving 74L
s The MM74C93 follows the MM74L93 Pinout
t4UOrdering Code:
Order Number
eMM74C93N
Package Number
Package Description
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
eConnection Diagram
.DataShTopView
wwwLogic Diagram
Truth Table
4-Bit Binary Counter Binary Count Sequence
Count
Output
QD QC QB QA
0 LLLL
1 LLLH
2 L LHL
3 L LHH
4 LHLL
5 LHLH
6 LHHL
7 LHHH
8 HLLL
9 HLLH
10 H L H L
11 H L H H
12 H H L L
13 H H L H
14 H H H L
15 H H H H
Output QA is connected to input B for binary count sequence.
H = HIGH Level
L = LOW Level
X = Irrelevant
© 2004 Fairchild Semiconductor Corporation DS005889
www.fairchildsemi.com

MM74C93
Function Tables
Reset/Count Function Table
Reset Inputs
Output
R01 R02 R91 R92 QD QC QB
HHLXL L L
HHX L L L L
XXHHHL L
XLXL
Count
LXLX
Count
LXXL
Count
XL LX
Count
QA
L
L
H
Reset/Count Function Table
Reset
Output
Inputs
R01 R02 QD QC QB
HHL LL
LX
Count
XL
Count
QA
L
www.fairchildsemi.com
2


Features MM74C93 4-Bit Binary Counter October 19 87 Revised January 2004 MM74C93 4-Bit Binary Counter General Description The MM74C93 binary counter and complementar y MOS (CMOS) integrated circuits constr ucted with N- and Pchannel enhancement mode transistors. The 4-bit binary coun ter can be reset to zero by applying hi gh logic level on inputs R01 and R02, a nd a separate flip-flop on the A-bit en ables the user to operate it as a divid e-by-2, -8, or -16 divider. Counting oc curs on the negative going edge of the input pulse. All inputs are protected a gainst static discharge damage. Featur es s Wide supply voltage range: 3V to 1 5V s Guaranteed noise margin: 1V s High noise immunity: 0.45 VCC (typ.) s Low power compatibility: Fan out of 2 TTL d riving 74L s The MM74C93 follows the MM 74L93 Pinout Ordering Code: Order Numb er MM74C93N Package Number N14A Packag e Description 14-Lead Plastic Dual-In- Line Package (PDIP), JEDEC MS-001, 0.30 0" Wide Connection Diagram Truth Table Top View Logic Diagr.
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