3-STATE Buffer. MM74HCT541 Datasheet


MM74HCT541 Buffer. Datasheet pdf. Equivalent


Part Number

MM74HCT541

Description

Octal 3-STATE Buffer

Manufacture

Fairchild

Total Page 11 Pages
Datasheet
Download MM74HCT541 Datasheet


MM74HCT541
MM74HCT540, Inverting Octal 3-STATE Buffer
MM74HCT541, Octal 3-STATE Buffer
June 2007
tm
Features
TTL input compatible
Typical propagation delay: 12ns
3-STATE outputs for connection to system buses
Low quiescent current: 80µA
Output current: 6mA (Min.)
General Description
The MM74HCT540 and MM74HCT541 3-STATE buffers
utilize advanced silicon-gate CMOS technology and are
general purpose high speed inverting and non-inverting
buffers. They possess high drive current outputs which
enable high speed operation even when driving large
bus capacitances. These circuits achieve speeds com-
parable to low power Schottky devices, while retaining
the low power consumption of CMOS. Both devices are
TTL input compatible and have a fanout of 15 LS-TTL
equivalent inputs.
MM74HCT devices are intended to interface between
TTL and NMOS components and standard CMOS
devices. These parts are also plug-in replacements for
LS-TTL devices and can be used to reduce power con-
sumption in existing designs.
The MM74HCT540 is an inverting buffer and the
MM74HCT541 is a non-inverting buffer. The 3-STATE
control gate operates as a two-input NOR such that if
either G1 or G2 are HIGH, all eight outputs are in the
high-impedance state.
In order to enhance PC board layout, the MM74HCT540
and MM74HCT541 offers a pinout having inputs and
outputs on opposite sides of the package. All inputs are
protected from damage due to static discharge by diodes
to VCC and ground.
Ordering Information
Order Number
MM74HCT540WM
MM74HCT540SJ
MM74HCT540MTC
MM74HCT541WM
MM74HCT541SJ
MM74HCT541MTC
MM74HCT541N
Package
Number
M20B
M20D
MTC20
M20B
M20D
MTC20
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering number.
©1984 Fairchild Semiconductor Corporation
MM74HCT540, MM74HCT541 Rev. 1.3
www.fairchildsemi.com

MM74HCT541
Connection Diagrams
Pin Assignments for DIP, SOIC, SOP and TSSOP
Top View, MM74HCT540
Top View, MM74HCT541
©1984 Fairchild Semiconductor Corporation
Rev. 1.3
2
www.fairchildsemi.com


Features MM74HCT540 • MM74HCT541 Inverting Octa l 3-STATE Buffer • Octal 3-STATE Buff er February 1984 Revised February 1999 MM74HCT540 • MM74HCT541 Inverting O ctal 3-STATE Buffer • Octal 3-STATE B uffer General Description The MM74HCT54 0 and MM74HCT541 3-STATE buffers utiliz e advanced silicon-gate CMOS technology and are general purpose high speed inv erting and non-inverting buffers. They possess high drive current outputs whic h enable high speed operation even when driving large bus capacitances. These circuits achieve speeds comparable to l ow power Schottky devices, while retain ing the low power consumption of CMOS. Both devices are TTL input compatible a nd have a fanout of 15 LS-TTL equivalen t inputs. MM74HCT devices are intended to interface between TTL and NMOS compo nents and standard CMOS devices. These parts are also plug-in replacements for LS-TTL devices and can be used to redu ce power consumption in existing design s. The MM74HCT540 is an inverting buffer and the MM74HCT541 is a non-in.
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