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NAND Gate. NTE9672 Datasheet

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NAND Gate. NTE9672 Datasheet
















NTE9672 Gate. Datasheet pdf. Equivalent













Part

NTE9672

Description

Integrated Circuit High Threshold Logic (HTL) Quad / 2-Input NAND Gate



Feature


NTE9672 Integrated Circuit High Threshol d Logic (HTL) Quad, 2–Input NAND Gate Description: This NTE9672 is a Quad, 2 –Input NAND gate with active output p ull–up in a 14–Lead DIP style packa ge. The active output arrangement allow s the circuit to handle capacitive load s at a higher speed than is obtainable with a passive pullup configuration. Ad ditionally, the impedance .
Manufacture

NTE Electronics

Datasheet
Download NTE9672 Datasheet


NTE Electronics NTE9672

NTE9672; in the high state is considerably less, and consequently makes this device more immune to electrical noise. The active output configuration also allows for a more powerful arrangement to interface with discrete components. Electrical C haracteristics: (TA = +25°C unless oth erwise specified) Parameter Output Volt age Symbol VOL VOH Short–Circuit Curr ent Reverse Current O.


NTE Electronics NTE9672

utput Leakage Current Forward Current Po wer Drain Current Total Device Switchin g Times ISC IR ICEX IF ICCL ICCH t1–3 + t1+3– IOL =12mA (Pulse In), IOH = 0.03mA (Pulse Out), VCC = 15V Test Co nditions IOL = 12mA, VIH = 8.5V, VCCL = 14V IOH = –0.03mA, VIL = 6.5V, VCC = 15V, VCCL = 14V VCCH = 16V VR = 16V, V CCL = 14V VCEX = 16V VF = 1.5V, VR = 16 V, VCCH = 16V VCCH = 16V M.


NTE Electronics NTE9672

in – 12.5 –6.5 – – – – – – Typ Max Unit – – – – – – – – – – 1.5 – –15 2 10 0 –1.2 6 20 200 100 V V mA µA µA mA mA mA ns ns Logic Symbol 1 2 Input A1 4 5 9 10 12 13 6 Input B1 Output Y1 8 Input A2 Input B2 11 Output Y2 GND 3 P in Connection Diagram 1 2 3 4 5 6 7 1 4 VCC 13 Input B4 12 Input A4 11 Output Y4 10 Input B3 9 8 Input A3 Output Y3 Positive Logic: 3 = 1 D .





Part

NTE9672

Description

Integrated Circuit High Threshold Logic (HTL) Quad / 2-Input NAND Gate



Feature


NTE9672 Integrated Circuit High Threshol d Logic (HTL) Quad, 2–Input NAND Gate Description: This NTE9672 is a Quad, 2 –Input NAND gate with active output p ull–up in a 14–Lead DIP style packa ge. The active output arrangement allow s the circuit to handle capacitive load s at a higher speed than is obtainable with a passive pullup configuration. Ad ditionally, the impedance .
Manufacture

NTE Electronics

Datasheet
Download NTE9672 Datasheet




 NTE9672
NTE9672
Integrated Circuit
High Threshold Logic (HTL)
Quad, 2–Input NAND Gate
Description:
This NTE9672 is a Quad, 2–Input NAND gate with active output pull–up in a 14–Lead DIP style pack-
age. The active output arrangement allows the circuit to handle capacitive loads at a higher speed
than is obtainable with a passive pullup configuration. Additionally, the impedance in the high state
is considerably less, and consequently makes this device more immune to electrical noise. The active
output configuration also allows for a more powerful arrangement to interface with discrete compo-
nents.
Electrical Characteristics: (TA = +25°C unless otherwise specified)
Parameter
Symbol
Test Conditions
Output Voltage
Short–Circuit Current
Reverse Current
Output Leakage Current
Forward Current
Power Drain Current
Total Device
Switching Times
VOL
VOH
ISC
IR
ICEX
IF
ICCL
ICCH
t1–3+
t1+3–
IOL = 12mA, VIH = 8.5V, VCCL = 14V
IOH = –0.03mA, VIL = 6.5V, VCC = 15V,
VCCL = 14V
VCCH = 16V
VR = 16V, VCCL = 14V
VCEX = 16V
VF = 1.5V, VR = 16V, VCCH = 16V
VCCH = 16V
IOL =12mA (Pulse In),
IOH = –0.03mA (Pulse Out), VCC = 15V
Min Typ Max Unit
– – 1.5 V
12.5 – – V
–6.5 – –15 mA
– – 2 µA
– – 100 µA
– – –1.2 mA
– – 6 mA
– – 20 mA
– – 200 ns
– – 100 ns




 NTE9672
Logic Symbol
1
3
2
4
6
5
9
8
10
12
11
13
Positive Logic: 3 = 1 D 2
Input Loading Factor = 1
Output Loading Factor = 10
Propagation Delay Time = 110ns Typ
Typical Total Power Dissipation
Input High = 176mW
Inputs Low = 52mW
Pin Connection Diagram
Input A1 1
Input B1 2
Output Y1 3
Input A2 4
Input B2 5
Output Y2 6
GND 7
14 VCC
13 Input B4
12 Input A4
11 Output Y4
10 Input B3
9 Input A3
8 Output Y3
14 8
17
.785 (19.95) Max
.200
(5.08)
Max
.300 (7.62)
.100 (2.45)
.600 (15.24)
.099 (2.5) Min








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