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D/A Converter. HI5628 Datasheet

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D/A Converter. HI5628 Datasheet
















HI5628 Converter. Datasheet pdf. Equivalent













Part

HI5628

Description

8-Bit / 165/125/60MSPS / Dual High Speed CMOS D/A Converter



Feature


HI5628 Data Sheet July 1999 File Number 4520.3 8-Bit, 165/125/60MSPS, Dual Hig h Speed CMOS D/A Converter The HI5628 i s an 8-bit, dual 125MSPS D/A converter which is implemented in an advanced CMO S process. Operating from a single +5V to +3V supply, the converter provides 2 0.48mA of full scale output current and includes an input data register. Low g litch energy and e.
Manufacture

Intersil

Datasheet
Download HI5628 Datasheet


Intersil HI5628

HI5628; xcellent frequency domain performance ar e achieved using a segmented architectu re. The single DAC version is the HI566 0 while 10-bit versions exist in the HI 5760 and HI5728. This DAC is a member o f the CommLink™ family of communicati on devices. Features • Throughput Ra te . . . . . . . . . . . . . . . . . . . . . . . 125MSPS • Low Power . . . . . . . . . . . . . . 330.


Intersil HI5628

mW at 5V, 170mW at 3V • Integral Linea rity Error . . . . . . . . . . . . . . . . . . . ±0.25 LSB • Differential L inearity . . . . . . . . . . . . . . . . . . . . . ±0.25 LSB • Channel Isol ation (Typ). . . . . . . . . . . . . . . . . . . . . . . 80dB • SFDR to Nyqu ist at 10MHz Output . . . . . . . . . . . . 60dBc • Internal 1.2V Bandgap Vo ltage Reference • Single Power.


Intersil HI5628

Supply from +5V to +3V • CMOS Compati ble Inputs • Excellent Spurious Free Dynamic Range Ordering Information PAR T NUMBER HI5628/16IN† HI5628IN HI5628 /6IN HI5628EVAL1† TEMP. RANGE (oC) MA X CLOCK SPEED Applications • Direct Digital Frequency Synthesis • Wireles s Communications • Signal Reconstruct ion • Arbitrary Waveform Generators Test Equipment • High Resolution .





Part

HI5628

Description

8-Bit / 165/125/60MSPS / Dual High Speed CMOS D/A Converter



Feature


HI5628 Data Sheet July 1999 File Number 4520.3 8-Bit, 165/125/60MSPS, Dual Hig h Speed CMOS D/A Converter The HI5628 i s an 8-bit, dual 125MSPS D/A converter which is implemented in an advanced CMO S process. Operating from a single +5V to +3V supply, the converter provides 2 0.48mA of full scale output current and includes an input data register. Low g litch energy and e.
Manufacture

Intersil

Datasheet
Download HI5628 Datasheet




 HI5628
Data Sheet
HI5628
July 1999 File Number 4520.3
8-Bit, 165/125/60MSPS, Dual High Speed
CMOS D/A Converter
The HI5628 is an 8-bit, dual 125MSPS D/A converter which
is implemented in an advanced CMOS process. Operating
from a single +5V to +3V supply, the converter provides
20.48mA of full scale output current and includes an input
data register. Low glitch energy and excellent frequency
domain performance are achieved using a segmented
architecture. The single DAC version is the HI5660 while
10-bit versions exist in the HI5760 and HI5728. This DAC is
a member of the CommLink™ family of communication
devices.
Ordering Information
PART
NUMBER
TEMP.
RANGE
(oC)
MAX
CLOCK
PACKAGE PKG. NO. SPEED
HI5628/16IN-40 to 85 48 Ld LQFP Q48.7x7A 165MHz
HI5628IN
-40 to 85 48 Ld LQFP Q48.7x7A 125MHz
HI5628/6IN
-40 to 85 48 Ld LQFP Q48.7x7A 60MHz
HI5628EVAL1
25 Evaluation Platform
125MHz
Contact factory for availability.
Features
• Throughput Rate . . . . . . . . . . . . . . . . . . . . . . . 125MSPS
• Low Power . . . . . . . . . . . . . . 330mW at 5V, 170mW at 3V
• Integral Linearity Error . . . . . . . . . . . . . . . . . . . ±0.25 LSB
• Differential Linearity . . . . . . . . . . . . . . . . . . . . . ±0.25 LSB
• Channel Isolation (Typ). . . . . . . . . . . . . . . . . . . . . . . 80dB
• SFDR to Nyquist at 10MHz Output . . . . . . . . . . . . 60dBc
• Internal 1.2V Bandgap Voltage Reference
• Single Power Supply from +5V to +3V
• CMOS Compatible Inputs
• Excellent Spurious Free Dynamic Range
Applications
• Direct Digital Frequency Synthesis
• Wireless Communications
• Signal Reconstruction
• Arbitrary Waveform Generators
• Test Equipment
• High Resolution Imaging Systems
Pinout
HI5628 (LQFP)
ID4
ID3
ID2
ID1
ID0 (LSB)
DGND
DGND
SLEEP
DVDD
DGND
NC
AVDD
48 47 46 45 44 43 42 41 40 39 38 37
1 36
2 35
3 34
4 33
5 32
6 31
7 30
8 29
9 28
10 27
11 26
1213 14
15 16
17 18 19
20
21 22
25
23 24
QD4
QD3
QD2
QD1
QD0 (LSB)
DGND
DGND
DVDD
DGND
NC
AVDD
AGND
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
CommLink™ is a trademark of Intersil Corporation.




 HI5628
HI5628
Typical Applications Circuit
50
ICLK/QCLK
DVDD
0.1µF
DVDD
0.1µF
ANALOG GROUND
PLANE
DIGITAL GROUND
PLANE
SLEEP
DVDD
0.1µF
ID4
ID3
ID2
ID1
ID0 (LSB)
48 47 46 45 44 43 42 41 40 39 38 37
1 36
2 35
3 34
4 33
5 32
6 DGND
DGND 31
7 DGND
DGND 30
8 DVDD 29
9 DVDD
DGND 28
10 DGND
NC (GND) 27
11 NC (GROUND)
AVDD 26
1213
14
15
16
17
18
19
20
21 22
23
25
24
QD4
QD3
QD2
QD1
QD0 (LSB)
AVDD
0.1µF
AVDD
0.1µF
AGND
AVDD
ICOMP1
0.1µF
AGND
RSET
1.91k
QCOMP1
REFIO
0.1µF
0.1µF
AVDD
0.1µF
DVDD
PLANE
5050
5050
NOTE: ICOMP1 AND QCOMP1 PINS (24, 14)
MUST BE TIED TOGETHER EXTERNALLY
IOUTA
IOUTB QOUTB QOUTA
+5V TO +3V
POWER SUPPLY
FERRITE
BEAD
10µH
10µF
DVDD
(POWER PLANE)
0.1µF
AVDD
(POWER PLANE)
FERRITE
BEAD
10µH
0.1µF
+5V TO +3V (SUPPLY)
+
10µF
NOTE: Recommended seperate analog and digital ground planes, connected at a single point near the device. See AN9827.
2




 HI5628
Functional Block Diagram
HI5628
IOUTA IOUTB
(LSB) ID0
ID1
ID2
ID3
ID4
ID5
ID6
(MSB) ID7
LATCH
UPPER
5-BIT
DECODER
31
34
LATCH
SWITCH
MATRIX
CASCODE
CURRENT
SOURCE
34
3 LSBs
+
31 MSB
SEGMENTS
ICLK
INT/EXT
REFERENCE
SELECT
INT/EXT
VOLTAGE
REFERENCE
BIAS
GENERATION
ICOMP1
REFLO
REFIO
FSADJ
SLEEP
(LSB) QD0
QD1
QD2
QD3
QD4
QD5
QD6
(MSB) QD7
QCLK
LATCH
QCOMP1
UPPER
5-BIT
DECODER
31
34
LATCH
SWITCH
MATRIX
CASCODE
CURRENT
SOURCE
34
3 LSBs
+
31 MSB
SEGMENTS
AVDD AGND DVDD DGND
QOUTA QOUTB
3




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