N-Channel Enhancement Mode Field Effect Transistor
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high
density process is especially tailored to minimize
on-state resistance and provide superior switching
performance. These devices are particularly suited for
low voltage applications such as DC motor control and
DC/DC conversion where fast switching, low in-line
power loss, and resistance to transients are needed.
4 A, 60 V. RDS(ON) = 0.100 Ω @ VGS = 10 V.
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
Absolute Maximum Ratings TA = 25oC unless otherwise noted
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage - Continuous
ID Maximum Drain Current - Continuous (Note 1a)
PD Maximum Power Dissipation
TJ,TSTG Operating and Storage Temperature Range
RθJA Thermal Resistance, Junction-to-Ambient
RθJC Thermal Resistance, Junction-to-Case
* Order option J23Z for cropped center drain lead.
-65 to 150
© 1998 Fairchild Semiconductor Corporation