Nonvolatile SRAM. DS1230AB Datasheet

DS1230AB SRAM. Datasheet pdf. Equivalent

DS1230AB Datasheet
Recommendation DS1230AB Datasheet
Part DS1230AB
Description 256k Nonvolatile SRAM
Feature DS1230AB; 19-5635; Rev 11/10 www.maxim-ic.com DS1230Y/AB 256k Nonvolatile SRAM FEATURES  10 years minimum .
Manufacture Dallas
Datasheet
Download DS1230AB Datasheet





Dallas DS1230AB
19-5635; Rev 11/10
www.maxim-ic.com
DS1230Y/AB
256k Nonvolatile SRAM
FEATURES
10 years minimum data retention in the
absence of external power
Data is automatically protected during power
loss
Replaces 32k x 8 volatile static RAM,
EEPROM or Flash memory
Unlimited write cycles
Low-power CMOS
Read and write access times of 70 ns
Lithium energy source is electrically
disconnected to retain freshness until power is
applied for the first time
Full ±10% VCC operating range (DS1230Y)
Optional ±5% VCC operating range
(DS1230AB)
Optional industrial temperature range of
-40°C to +85°C, designated IND
JEDEC standard 28-pin DIP package
PowerCap Module (PCM) package
- Directly surface-mountable module
- Replaceable snap-on PowerCap provides
lithium backup battery
- Standardized pinout for all nonvolatile
SRAM products
- Detachment feature on PowerCap allows
easy removal using a regular screwdriver
PIN ASSIGNMENT
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 VCC
27 WE
26 A13
25 A8
24 A9
23 A11
22 OE
21 A10
20 CE
19 DQ7
18 DQ6
17
DQ5
16 DQ4
15 DQ3
28-Pin Encapsulated Package
740-mil Extended
NC 1
NC 2
NC 3
NC 4
VCC 5
WE 6
OE 7
CE 8
DQ7
9
DQ6
10
DQ5
11
DQ4
12
DQ3
DQ2
13
14
GND VBAT
DQ1
15
DQ0
16
GND
17
34 NC
33 NC
32 A14
31 A13
30 A12
29 A11
28 A10
27 A9
26 A8
25 A7
24 A6
23 A5
22 A4
21 A3
20 A2
19 A1
18 A0
34-Pin PowerCap Module (PCM)
(Uses DS9034PC+ or DS9034PCI+ PowerCap)
PIN DESCRIPTION
A0 - A14
- Address Inputs
DQ0 - DQ7
- Data In/Data Out
CE - Chip Enable
WE - Write Enable
OE - Output Enable
VCC
GND
- Power (+5V)
- Ground
NC - No Connect
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Dallas DS1230AB
DS1230Y/AB
DESCRIPTION
The DS1230 256k Nonvolatile SRAMs are 262,144-bit, fully static, nonvolatile SRAMs organized as
32,768 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and control circuitry
which constantly monitors VCC for an out-of-tolerance condition. When such a condition occurs, the
lithium energy source is automatically switched on and write protection is unconditionally enabled to
prevent data corruption. DIP-package DS1230 devices can be used in place of existing 32k x 8 static
RAMs directly conforming to the popular bytewide 28-pin DIP standard. The DIP devices also match the
pinout of 28256 EEPROMs, allowing direct substitution while enhancing performance. DS1230 devices
in the Low Profile Module package are specifically designed for surface-mount applications. There is no
limit on the number of write cycles that can be executed and no additional support circuitry is required for
microprocessor interfacing.
READ MODE
The DS1230 devices execute a read cycle whenever WE (Write Enable) is inactive (high) and CE (Chip
Enable) and OE (Output Enable) are active (low). The unique address specified by the 15 address inputs
(A0 - A14) defines which of the 32,768 bytes of data is to be accessed. Valid data will be available to the
eight data output drivers within tACC (Access Time) after the last address input signal is stable, providing
that CE and OE (Output Enable) access times are also satisfied. If OE and CE access times are not
satisfied, then data access must be measured from the later-occurring signal ( CE or OE ) and the limiting
parameter is either tCO for CE or tOE for OE rather than address access.
WRITE MODE
The DS1230 devices execute a write cycle whenever the WE and CE signals are active (low) after
address inputs are stable. The later-occurring falling edge of CE or WE will determine the start of the
write cycle. The write cycle is terminated by the earlier rising edge of CE or WE . All address inputs must
be kept valid throughout the write cycle. WE must return to the high state for a minimum recovery time
(tWR) before another cycle can be initiated. The OE control signal should be kept inactive (high) during
write cycles to avoid bus contention. However, if the output drivers are enabled ( CE and OE active) then
WE will disable the outputs in tODW from its falling edge.
DATA RETENTION MODE
The DS1230AB provides full functional capability for VCC greater than 4.75 volts and write protects by
4.5 volts. The DS1230Y provides full functional capability for VCC greater than 4.5 volts and write
protects by 4.25 volts. Data is maintained in the absence of VCC without any additional support circuitry.
The nonvolatile static RAMs constantly monitor VCC. Should the supply voltage decay, the NV SRAMs
automatically write protect themselves, all inputs become “don’t care,” and all outputs become high-
impedance. As VCC falls below approximately 3.0 volts, a power switching circuit connects the lithium
energy source to RAM to retain data. During power-up, when VCC rises above approximately 3.0 volts
the power switching circuit connects external VCC to RAM and disconnects the lithium energy source.
Normal RAM operation can resume after VCC exceeds 4.75 volts for the DS1230AB and 4.5 volts for the
DS1230Y.
FRESHNESS SEAL
Each DS1230 device is shipped from Maxim with its lithium energy source disconnected, guaranteeing
full energy capacity. When VCC is first applied at a level greater than 4.25 volts, the lithium energy source
is enabled for battery back-up operation.
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Dallas DS1230AB
DS1230Y/AB
PACKAGES
The DS1230 devices are available in two packages: 28-pin DIP and 34-pin PowerCap Module (PCM).
The 28-pin DIP integrates a lithium battery, an SRAM memory and a nonvolatile control function into a
single package with a JEDEC-standard, 600-mil DIP pinout. The 34-pin PowerCap Module integrates
SRAM memory and nonvolatile control along with contacts for connection to the lithium battery in the
DS9034PC PowerCap. The PowerCap Module package design allows a DS1230 PCM device to be
surface mounted without subjecting its lithium backup battery to destructive high-temperature reflow
soldering. After a DS1230 PCM is reflow soldered, a DS9034PC PowerCap is snapped on top of the
PCM to form a complete Nonvolatile SRAM module. The DS9034PC is keyed to prevent improper
attachment. DS1230 PowerCap Modules and DS9034PC PowerCaps are ordered separately and shipped
in separate containers. See the DS9034PC data sheet for further information.
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