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Static RAM. KM62256D Datasheet

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Static RAM. KM62256D Datasheet






KM62256D RAM. Datasheet pdf. Equivalent




KM62256D RAM. Datasheet pdf. Equivalent





Part

KM62256D

Description

32K x 8 bit Low Power CMOS Static RAM



Feature


KM62256D Family Document Title 32Kx8 bit Low Power CMOS Static RAM CMOS SRAM Revision History Revision No History 0. 0 0.1 Initial draft First revision - KM 62256DL/DLI ISB1 = 100 → 50µA KM6225 6DL-L ISB1 = 20 → 10µA KM62256DLI-L ISB1 = 50 → 15µA - CIN = 6 → 8pF, CIO = 8 → 10pF - KM62256D-4/5/7 Famil y tOH = 5 → 10ns - KM62256DL/DLI IDR = 50→30µA KM62256DL-L/DLI-L I DR .
Manufacture

Samsung

Datasheet
Download KM62256D Datasheet


Samsung KM62256D

KM62256D; = 30 → 15µA Finalize - Remove ICC wri te value - Improved operating current I CC2 = 70 → 60mA - Improved standby cu rrent KM62256DL/DLI ISB1 = 50 → 30µA KM62256DL-L I SB1 = 10 → 5µA KM6225 6DLI-L ISB1 = 15 → 5µA - Improved da ta retention current KM62256DL/DLI IDR = 30 → 5µA KM62256DL-L/DLI-L IDR = 1 5 → 3µ A - Remove 45ns part from com mercial product and 100ns part from in.


Samsung KM62256D

dustrial product. Replace test load 100p F to 50pF for 55ns part Draft Data May 18, 1997 April 1, 1997 Remark Design target Preliminily 1.0 November 11, 1 997 Final The attached datasheets are provided by SAMSUNG Electronics. SAMSU NG Electronics CO., LTD. reserves the r ight to change the specifications and p roducts. SAMSUNG Electronics will answe r to your question.


Samsung KM62256D

s about device. If you have any question s, please contact the SAMSUNG branch of fices. Revision 1.0 November 1997 KM6 2256D Family 32Kx8 bit Low Power CMOS S tatic RAM FEATURES • • • • • • Process Technology : TFT Organizati on : 32Kx8 Power Supply Voltage : 4.5~5 .5V Low Data Retention Voltage : 2V(Min ) Three state output and TTL Compatible Package Type : 28-DIP-600B, 2.

Part

KM62256D

Description

32K x 8 bit Low Power CMOS Static RAM



Feature


KM62256D Family Document Title 32Kx8 bit Low Power CMOS Static RAM CMOS SRAM Revision History Revision No History 0. 0 0.1 Initial draft First revision - KM 62256DL/DLI ISB1 = 100 → 50µA KM6225 6DL-L ISB1 = 20 → 10µA KM62256DLI-L ISB1 = 50 → 15µA - CIN = 6 → 8pF, CIO = 8 → 10pF - KM62256D-4/5/7 Famil y tOH = 5 → 10ns - KM62256DL/DLI IDR = 50→30µA KM62256DL-L/DLI-L I DR .
Manufacture

Samsung

Datasheet
Download KM62256D Datasheet




 KM62256D
KM62256D Family
Document Title
32Kx8 bit Low Power CMOS Static RAM
Revision History
Revision No History
0.0 Initial draft
0.1 First revision
- KM62256DL/DLI ISB1 = 100 50µA
KM62256DL-L ISB1 = 20 10µA
KM62256DLI-L ISB1 = 50 15µA
- CIN = 6 8pF, CIO = 8 10pF
- KM62256D-4/5/7 Family
tOH = 5 10ns
- KM62256DL/DLI IDR = 5030µA
KM62256DL-L/DLI-L IDR = 30 15µA
1.0 Finalize
- Remove ICC write value
- Improved operating current
ICC2 = 70 60mA
- Improved standby current
KM62256DL/DLI ISB1 = 50 30µA
KM62256DL-L ISB1 = 10 5µA
KM62256DLI-L ISB1 = 15 5µA
- Improved data retention current
KM62256DL/DLI IDR = 30 5µA
KM62256DL-L/DLI-L IDR = 15 3µA
- Remove 45ns part from commercial product and 100ns part
from industrial product.
Replace test load 100pF to 50pF for 55ns part
CMOS SRAM
Draft Data
May 18, 1997
April 1, 1997
Remark
Design target
Preliminily
November 11, 1997 Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserves the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
Revision 1.0
November 1997




 KM62256D
KM62256D Family
CMOS SRAM
32Kx8 bit Low Power CMOS Static RAM
FEATURES
Process Technology : TFT
Organization : 32Kx8
Power Supply Voltage : 4.5~5.5V
Low Data Retention Voltage : 2V(Min)
Three state output and TTL Compatible
Package Type : 28-DIP-600B, 28-SOP-450
28-TSOP1-0813.4 F/R
PRODUCT FAMILY
Product Family Operating Temperature VCC Range
KM62256DL
KM62256DL-L
Commercial (0~70°C)
KM62256DLI
KM62256DLI-L
Industrial (-40~85°C)
1. The parameter is tested with 50pF test load.
4.5 to 5.5V
GENERAL DESCRIPTION
The KM62256D families are fabricated by SAMSUNGs
advanced CMOS process technology. The families support
various operating temperature ranges and have various
package types for user flexibility of system design. The fami-
lies also support low data retention voltage for battery back-
up operation with low data retention current.
Speed
551)/70ns
70ns
Power Dissipation
Standby
(ISB1, Max)
30µA
Operating
(Icc2, Max)
5µA
30µA
60mA
5µA
PKG Type
28-DIP,28-SOP
28-TSOP1-F/R
28-SOP
28-TSOP1-F/R
PIN DESCRIPTION
FUNCTIONAL BLOCK DIAGRAM
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
VSS
1 28
2 27
3 26
4 25
5 24
6 23
7 28-DIP 22
8 28-SOP 21
9 20
10 19
11 18
12 17
13 16
14 15
OE
A11
A9
A8
VCC A13
WE
WE
VCC
A13 A14
A12
A8 A7
A6
A9 A5
A11 A4
A3
OE
A10 A3
A4
CS A5
A6
I/O8
A7
I/O7 A12
A14
I/O6 VCC
WE
I/O5 A13
I/O4 A8
A9
A11
OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
14
13
12
11
10
9
8
7
6
5
4
3
2
1
28-TSOP
Type1 - Forward
28-TSOP
Type1 - Reverse
28 A10
27 CS
26 I/O8
25 I/O7
24 I/O6
23 I/O5
22 I/O4
21 VSS
20 I/O3
19 I/O2
18 I/O1
17 A0
16 A1
15 A2
15 A2
16 A1
17 A0
18 I/O1
19 I/O2
20 I/O3
21 VSS
22 I/O4
23 I/O5
24 I/O6
25 I/O7
26 I/O8
27 CS
28 A10
Pin Name
Function
Pin Name
Function
CS Chip Select Input
I/O1~I/O8 Data Inputs/Outputs
OE Output Enable Input
Vcc Power
WE Write Enable Input
Vss Ground
A0~A14 Address Inputs
NC No connect
CS
WE
OE
A13
A8
A12
A14
A4
A5
A6
A7
I/O1
I/O8
Control
Logic
Clk gen.
Precharge circuit.
Row
select
Memory array
256 rows
128×8 columns
Data
cont
I/O Circuit
Column select
Data
cont
A10 A3 A0 A1 A2 A9 A11
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
Revision 1.0
November 1997




 KM62256D
KM62256D Family
PRODUCT LIST
Commercial Temperature Products(0~70°C)
Part Name
Function
KM62256DLP-5
KM62256DLP-5L
KM62256DLP-7
KM62256DLP-7L
KM62256DLG-5
KM62256DLG-5L
KM62256DLG-7
KM62256DLG-7L
KM62256DLTG-5
KM62256DLTG-5L
KM62256DLTG-7
KM62256DLTG-7L
KM62256DLRG-5
KM62256DLRG-5L
KM62256DLRG-7
KM62256DLRG-7L
28-DIP, 55ns, L-pwr
28-DIP, 55ns, LL-pwr
28-DIP, 70ns, L-pwr
28-DIP, 70ns, LL-pwr
28-SOP, 50ns, L-pwr
28-SOP, 50ns, LL-pwr
28-SOP, 70ns, L-pwr
28-SOP, 70ns, LL-pwr
28-TSOP1 F, 55ns, L-pwr
28-TSOP1 F, 55ns, LL-pwr
28-TSOP1 F, 70ns, L-pwr
28-TSOP1 F, 70ns, LL-pwr
28-TSOP1 R, 55ns, L-pwr
28-TSOP1 R, 55ns, LL-pwr
28-TSOP1 R, 70ns, L-pwr
28-TSOP1 R, 70ns, LL-pwr
CMOS SRAM
Industrial Temperature Products(-40~85°C)
Part Name
Function
KM62256DLGI-7
KM62256DLGI-7L
KM62256DLTGI-7
KM62256DLTGI-7L
KM62256DLRGI-7
KM62256DLRGI-7L
28-SOP, 70ns, L-pwr
28-SOP, 70ns, LL-pwr
28-TSOP1 F, 70ns, L-pwr
28-TSOP1 F, 70ns, LL-pwr
28-TSOP1 R, 70ns, L-pwr
28-TSOP1 R, 70ns, LL-pwr
FUNCTIONAL DESCRIPTION
CS OE WE
H X1) X1)
L HH
L LH
L X1) L
1. X means dont care (Must be in high or low states)
I/O
High-Z
High-Z
Dout
Din
Mode
Deselected
Output Disabled
Read
Write
Power
Standby
Active
Active
Active
ABSOLUTE MAXIMUM RATINGS1)
Item
Symbol
Ratings
Unit Remark
Voltage on any pin relative to Vss
VIN,VOUT
-0.5 to 7.0
V
-
Voltage on Vcc supply relative to Vss
VCC
-0.5 to 7.0
V
-
Power Dissipation
PD 1.0 W -
Storage temperature
TSTG
-65 to 150
°C
-
Operating Temperature
TA
0 to 70
°C KM62256DL
-40 to 85
°C KM62256DLI
Soldering temperature and time
TSOLDER
260°C, 10sec (Lead Only)
-
-
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be
restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Revision 1.0
November 1997



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