DS1004 5-Tap High Speed Silicon Delay Line
www.dalsemi.com
FEATURES
All-silicon timing circuit Five equally delayed clock phases per input Precise tap-to-tap delay tolerances of ±0.5, ±0.75, or ±1 ns Input-to-tap 1 delay of 5 ns Delay tolerances of ±1.5 ns over temperature and voltage Leading and trailing edge precision preserves the input symmetry CMOS des...
