IBM25PPC405GP Datasheet PDF


Part Number

IBM25PPC405GP

Description

Embedded Controller

Manufacture

IBM Microelectronics

Total Page 30 Pages
PDF Download
Download IBM25PPC405GP Datasheet PDF


Features Datasheet pdf www.DataSheet4U.com PowerPC 405GP Embed ded Processor Data Sheet Features • I BM PowerPC 405 32-bit RISC processor core operating up to 266MHz • Synchr onous DRAM (SDRAM) interface operating up to 133MHz - 32-bit interface for non -ECC applications - 40-bit interface se rves 32 bits of data plus 8 check bits for ECC applications • 4KB on-chip me mory (OCM) • External peripheral bus - Flash ROM/Boot ROM interface - Direct support for 8-, 16-, or 32-bit SRAM an d external peripherals - Up to eight de vices - External Mastering supported PCI Revision 2.2 compliant interface (32-bit, up to 66MHz) - Synchronous or asynchronous PCI Bus interface - Intern al or external PCI Bus Arbiter • Ethernet 10/100.
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IBM25PPC405GP Datasheet
www.DataSheet4U.com
PowerPC 405GP Embedded Processor Data Sheet
Features
• IBM PowerPC405 32-bit RISC processor core
operating up to 266MHz
• Synchronous DRAM (SDRAM) interface
operating up to 133MHz
- 32-bit interface for non-ECC applications
- 40-bit interface serves 32 bits of data plus 8
check bits for ECC applications
• PCI Revision 2.2 compliant interface (32-bit, up
to 66MHz)
- Synchronous or asynchronous PCI Bus
interface
- Internal or external PCI Bus Arbiter
• Ethernet 10/100Mbps (full-duplex) support with
media independent interface (MII)
• 4KB on-chip memory (OCM)
• External peripheral bus
• Programmable interrupt controller supports
seven external and 19 internal edge triggered or
level-sensitive interrupts
- Flash ROM/Boot ROM interface
- Direct support for 8-, 16-, or 32-bit SRAM
and external peripherals
- Up to eight devices
- External Mastering supported
• Programmable timers
• Two serial ports (16550 compatible UART)
• One IIC interface
• General purpose I/O (GPIO) available
• DMA support for external peripherals, internal
• Supports JTAG for board level testing
UART and memory
DataSheet4U.comInternal processor local Bus (PLB) runs at
- Scatter-gather chaining supported
SDRAM interface frequency
- Four channels
• Supports PowerPC processor boot from PCI
memory
DataShee
Description
Designed specifically to address embedded
applications, the PowerPC 405GP (PPC405GP)
provides a high-performance, low-power solution
that interfaces to a wide range of peripherals by
incorporating on-chip power management features
and lower power dissipation requirements.
This chip contains a high-performance RISC
processor core, SDRAM controller, PCI bus
interface, Ethernet interface, control for external
ROM and peripherals, DMA with scatter-gather
support, serial ports, IIC interface, and general
purpose I/O.
Technology: IBM CMOS SA-12E, 0.25 µm
(0.18 µm Leff)
Package: 456-ball (35mm or 27mm), or 413-ball
(25mm) enhanced plastic ball grid array (E-PBGA)
Power (typical): TBDW at 133MHz, 1.5W at
200MHz, 2W at 266MHz
DataSheet4U.com
6/20/03
DataSheet4 U .com
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