CXD2480R Drivers Datasheet

CXD2480R Datasheet PDF, Equivalent


Part Number

CXD2480R

Description

CMOS Timing Controller with CCD Drivers

Manufacture

ETC

Total Page 3 Pages
Datasheet
Download CXD2480R Datasheet


CXD2480R
CXD2480R (1/3)
IL08D
C-MOS TIMING CONTROLLER WITH CCD DRIVERS
—TOP VIEW—
37
38
39 GND
40
41
42 VL
43
44 VH
45
46
47
48
GND
VDD
GND
24
23
22
21
20
19
18
17
16
15
14
13
PIN
NO.
I/O
SIGNAL
PIN
NO.
1I
DCIN 25
2 — NC 26
3 — AVDD3 27
4 O H2 28
5 O H1 29
6—
GND
30
7 O RG 31
8 — AVDD2 32
9 — AVDD1 33
10 O XSHD 34
11 O XSHP 35
12 O
XRS
36
13 O ADCK 37
14 —
GND
38
15 O LLPDM 39
16 O
m17 I
.co18 I
19 I
t4u20 —
e21 O
e22 —
h23 I
www.datas24 I
PBLK
SEN
SDAT
SCK
VDD
ID
GND
HD
VD
40
41
42
43
44
45
46
47
48
I/O
O
O
I
I
I
O
I
I
O
O
O
O
O
O
O
O
O
SIGNAL
WEN
MCK
TEST2
VDD
RST
GND
OSCI
OSCO
GND
CKI
VDD
TEST1
V1
V2
GND
V3
V4
VL
SUB
VH
CPP3
CPP2
CPP1
DCOUT
31
OSCI
1
DCIN
32
OSCO
48
DCOUT
34
CKI
23
HD
24
VD
19 SCK
18
SDAT
17
SEN
36
TEST1
37
TEST2
RST
29
26
MCK
16
PBLK
15
CLPDM
21
ID
25
WEN
11
XSHP
10
XSHD
12
XRS
13
ADCK
7
RG
5
H1
4
H2
37
V1
38
V2
40
V3
41
V4
43
SUB
47
CPP1
46
CPP2
45
CPP3

CXD2480R
CXD2480R (2/3)
INPUT
CKI ; CLOCK
DCIN
; OPERATIONAL AMPLIFIER INPUT FOR GENERATING
THE SUB CLAMP VOLTAGE
HD ; HORIZONTAL SYNC SIGNAL
OSCI
; OSCILLATOR
RST
; RESET
SCK
; SERIAL COMMUNICATION CLOCK
SDAT
; SERIAL COMMUNICATION DATA
SEN
; SERIAL COMMUNICATION STROBE
TEST1, TEST2 ; TEST
VD ; VERTICAL SYNC SIGNAL
OUTPUT
ADCK
CLPDM
CPP1 - CPP3
DCOUT
H1, H2
ID
MCK
OSCO
PBLK
RG
SUB
V1 - V4
WEN
XRS
XSHD
XSHP
; A/D CONVERTER CLOCK
; CLAMP PLUSE FOR CCD DUMMY SIGNAL
; CHARGE PUMP CAPACITORS
; OPERATIONAL AMPLIFIER OUTPUT FOR GENERATING
THE SUB CLAMP VOLTAGE
; CCD HORIZONTAL REGISTER DRIVE PULSES
; LINE IDENTIFICATION SIGNAL
; MODULATION CLOCK (1/2 CKI)
; OSCILLATOR
; BLANKING CLEANING PULSE
; CCD RESET GATE DRIVE PULSE
; CCD ELECTRON-CHARGE DRAIN PULSE
; CCD VERTICAL REGISTER DRIVE PULSES
; WRITE ENABLE SIGNAL
(ONLY IN LOW-SPEED SHUTTER OPERATION)
; A/D CONVERTER SAMPLE AND HOLD PULSE
; SAMPLE AND HOLD PULSE FOR DATA
; SAMPLE AND HOLD PULSE FOR PRECHARGING


Features CXD2480R (1/3) IL08D C-MOS TIMING CONTR OLLER WITH CCD DRIVERS —TOP VIEW— 3 6 35 34 33 32 31 30 29 28 27 26 25 31 O SCI 1 DCIN 32 OSCO DCOUT 48 GND GND VDD NC AVDD3 AVDD2 AVDD1 GND 37 38 39 40 41 42 43 44 45 46 47 48 VDD GND GND VDD VL VH GND 24 23 22 21 20 1 9 18 17 16 15 14 13 34 23 24 19 18 17 CKI HD VD SCK SDAT SEN MCK PBLK CLPDM ID WEN XSHP XSHD XRS ADCK RG H1 H2 V1 26 16 15 21 25 11 10 12 13 7 5 4 37 38 40 41 43 47 46 45 1 2 3 4 5 6 7 8 9 1 0 11 12 V2 V3 V4 PIN NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 I/O I — — O O — O — O O O O — O O I I I — O — I I SIGNAL DCIN NC AVDD3 H2 H1 GND RG A VDD2 AVDD1 XSHD XSHP XRS ADCK GND LLPDM PBLK SEN SDAT SCK VDD ID GND HD VD PI N NO. 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 I/O O O I — I — I O — I — I O O — O O — O — O O O O SIGNAL WEN MCK TEST2 VDD RST GND OSCI OSCO GND CK I VDD TEST1 V1 V2 GND V3 V4 VL SUB VH CPP3 CPP2 CPP1 DCOUT 36 37 TEST1 TEST2 RST 29 SUB CPP1 CPP.
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