KM718V887
Document Title
256Kx18-Bit Synchronous Burst SRAM
256Kx18 Synchronous SRAM
Revision History
Rev. No. 0.0 0.1 History Initial draft Modify power down cycle timing & Interleaved read timing, Insert Note 4 at AC timing characteristics. Change ISB1 value from 10mA to 30mA. Change ISB2 value from 10mA to 20mA. Change Undershoot spec from -3.0V(pulse w...
