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ICS650-07C

Part Number	ICS650-07C
Manufacturer	Integrated Circuit Systems
Description	Networking Clock Source
Published	Apr 27, 2006
Detailed Description	( D a t a S h e e t : w w w . D a t a S h e e t 4 U . c o m ) PRELIMINARY INFORMATION ICS650-07C Networking Clock ...
Datasheet	ICS650-07C PDF File

Overview

( D a t a S h e e t : w w w .
D a t a S h e e t 4 U .
c o m ) PRELIMINARY INFORMATION ICS650-07C Networking Clock Source Description The ICS650-07C is a low cost, low jitter, high performance clock synthesizer for networking applications.
Using analog Phase-Locked Loop (PLL) techniques, the device accepts a 12.
5 MHz or 25.
00 MHz clock or fundamental mode crystal input to produce multiple output clocks for networking chips, PCI devices, SDRAM, and ASICs.
The ICS650-07C outputs all have 0 ppm synthesis error.
See the MK74CB214, ICS551, and ICS552-01 for non-PLL buffer devices which produce multiple low-skew copies of these output clocks.
See the ICS570, ICS9112-16/17/18 for zero delay b...

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