Flash Memory/SRAM. AM41DL6408G Datasheet

AM41DL6408G Memory/SRAM. Datasheet pdf. Equivalent

Part AM41DL6408G
Description Stacked Multi-Chip Package (MCP) Flash Memory/SRAM
Feature www.DataSheet4U.com Am41DL6408G Data Sheet July 2003 The following document specifies Spansion mem.
Manufacture SPANSION
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AM41DL6408G
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Am41DL6408G
Data Sheet
July 2003
The following document specifies Spansion memory products that are now offered by both Advanced
Micro Devices and Fujitsu. Although the document is marked with the name of the company that orig-
inally developed the specification, these products will be offered to customers of both AMD and
Fujitsu.
Continuity of Specifications
There is no change to this datasheet as a result of offering the device as a Spansion product. Any
changes that have been made are the result of normal datasheet improvement and are noted in the
document revision summary, where supported. Future routine revisions will occur when appropriate,
and changes will be noted in a revision summary.
Continuity of Ordering Part Numbers
AMD and Fujitsu continue to support existing part numbers beginning with “Am” and “MBM”. To order
these products, please use only the Ordering Part Numbers listed in this document.
For More Information
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Please contact your local AMD or Fujitsu sales office for additional information about Spansion
memory solutions.
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Publication Number 25560 Revision B Amendment 0 Issue Date August 19, 2002



AM41DL6408G
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PRELIMINARY
Am41DL6408G
Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous
Operation Flash Memory and 8 Mbit (1 M x 8-Bit/512 K x 16-Bit) Static RAM
DISTINCTIVE CHARACTERISTICS
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MCP Features
Minimum 1 million write cycles guaranteed per sector
Power supply voltage of 2.7 to 3.3 volt
High performance
20 year data retention at 125°C
— Reliable operation for the life of the system
— Access time as fast as 70 ns Flash/55 ns SRAM
Package
— 73-Ball FBGA
Operating Temperature
— –40°C to +85°C
SOFTWARE FEATURES
Data Management Software (DMS)
— AMD-supplied software manages data programming,
enabling EEPROM emulation
— Eases historical sector erase flash limitations
Flash Memory Features
Supports Common Flash Memory Interface (CFI)
Program/Erase Suspend/Erase Resume
ARCHITECTURAL ADVANTAGES
— Suspends program/erase operations to allow
programming/erasing in same bank
Simultaneous Read/Write operations
Data# Polling and Toggle Bits
— Data can be continuously read from one bank while
executing erase/program functions in another bank.
— Provides a software method of detecting the status of
program or erase cycles
— Zero latency between read and write operations
Flexible Bankarchitecture
Unlock Bypass Program command
— Reduces overall programming time when issuing multiple
— Read may occur in any of the three banks not being written
or erased.
program command sequences
— Four banks may be grouped by customer to achieveDdeastiraeSdheet4UHA.cRoDmWARE FEATURES
bank divisions.
Manufactured on 0.17 µm process technology
Any combination of sectors can be erased
SecSi™ (Secured Silicon) Sector: Extra 256 Byte sector
Ready/Busy# output (RY/BY#)
Factory locked and identifiable: 16 bytes available for
secure, random factory Electronic Serial Number; verifiable
— Hardware method for detecting program or erase cycle
completion
as factory locked through autoselect function. ExpressFlash
Hardware reset pin (RESET#)
option allows entire sector to be available for
factory-secured data
— Hardware method of resetting the internal state machine to
the read mode
Customer lockable: Sector is one-time programmable. Once
sector is locked, data cannot be changed.
Zero Power Operation
WP#/ACC input pin
— Write protect (WP#) function protects sectors 0, 1, 140, and
141, regardless of sector protect status
— Sophisticated power management circuits reduce power
consumed during inactive periods to nearly zero.
Boot sectors
— Top and bottom boot sectors in the same device
— Acceleration (ACC) function accelerates program timing
Sector protection
— Hardware method of locking a sector, either in-system or
using programming equipment, to prevent any program or
Compatible with JEDEC standards
erase operation within that sector
— Pinout and software compatible with single-power-supply
flash standard
— Temporary Sector Unprotect allows changing data in
protected sectors in-system
PERFORMANCE CHARACTERISTICS
High performance
— Access time as fast as 70 ns
— Program time: 4 µs/word typical utilizing Accelerate function
Ultra low power consumption (typical values)
— 2 mA active read current at 1 MHz
— 10 mA active read current at 5 MHz
— 200 nA in standby or automatic sleep mode
SRAM Features
Power dissipation
— Operating: 30 mA maximum
— Standby: 15µA maximum
CE1s# and CE2s Chip Select
Power down features using CE1s# and CE2s
Data retention supply voltage: 1.5 to 3.3 volt
Byte data control: LB#s (DQ7–DQ0), UB#s (DQ15–DQ8)
DataShee
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This document contains information on a product under development at Advanced Micro Devices. The information
Publication# 25560 Rev: B Amendment/+0
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
Issue Date: August 19, 2002
product without notice.
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Refer to AMD’s Website (www.amd.com) for the latest information.





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