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HDMI/DVI Switch. AD8191 Datasheet

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HDMI/DVI Switch. AD8191 Datasheet






AD8191 Switch. Datasheet pdf. Equivalent




AD8191 Switch. Datasheet pdf. Equivalent





Part

AD8191

Description

HDMI/DVI Switch



Feature


www.DataSheet4U.com 4:1 HDMI/DVI Switch with Equalization AD8191 FEATURES Four inputs, one output HDMI™/DVI links F our TMDS channels per link Supports 250 Mbps to 1.65 Gbps data rates Supports 25 MHz to 165 MHz pixel clocks Equalize d inputs for operation with long HDMI c ables (20 meters at 1080p) Fully buffer ed unidirectional inputs/outputs Global ly switchable, 50 Ω .
Manufacture

Analog Devices

Datasheet
Download AD8191 Datasheet


Analog Devices AD8191

AD8191; on-chip terminations Pre-emphasized outp uts Low added jitter Single-supply oper ation (3.3 V) Four auxiliary channels p er link Bidirectional unbuffered inputs /outputs Flexible supply operation (3.3 V to 5 V) HDCP standard compatible All ows switching of DDC bus and two additi onal signals Multiple channel bundling modes 1x (4:1) HDMI/DVI link switch (de fault) 2x (8:1) TM.


Analog Devices AD8191

DS channel and auxiliary signal switch 1 x (16:1) TMDS channel and auxiliary sig nal switch Output disable feature Reduc ed power dissipation Removable output t ermination Allows building of larger ar rays Two AD8191s support HDMI/DVI dual- link Standards compatible: HDMI receive r, DVI, HDCP Serial (I2C® slave) and p arallel control interface 100-lead, 14 mm × 14 mm LQFP, Pb.


Analog Devices AD8191

-free package FUNCTIONAL BLOCK DIAGRAM PP_CH[1:0] PP_OTO PP_OCL PP_EQ PP_EN PP _PRE[1:0] RESET PARALLEL SERIAL I2C_S DA I2C_SCL I2C_ADDR[2:0] VTTI 2 2 AD 8191 CONTROL LOGIC AVCC DVCC AMUXVCC AV EE DVEE VTTO 3 CONFIG INTERFACE + IP _A[3:0] IN_A[3:0] – + IP_B[3:0] IN_B[ 3:0] – + IP_C[3:0] IN_C[3:0] – + IP _D[3:0] IN_D[3:0] – 4 4 4 4 4 4 4 4 4 4 SWITCH CORE EQ PE +.

Part

AD8191

Description

HDMI/DVI Switch



Feature


www.DataSheet4U.com 4:1 HDMI/DVI Switch with Equalization AD8191 FEATURES Four inputs, one output HDMI™/DVI links F our TMDS channels per link Supports 250 Mbps to 1.65 Gbps data rates Supports 25 MHz to 165 MHz pixel clocks Equalize d inputs for operation with long HDMI c ables (20 meters at 1080p) Fully buffer ed unidirectional inputs/outputs Global ly switchable, 50 Ω .
Manufacture

Analog Devices

Datasheet
Download AD8191 Datasheet




 AD8191
www.DataSheet4U.com
4:1 HDMI/DVI Switch with Equalization
AD8191
FEATURES
Four inputs, one output HDMI™/DVI links
Four TMDS channels per link
Supports 250 Mbps to 1.65 Gbps data rates
Supports 25 MHz to 165 MHz pixel clocks
Equalized inputs for operation with long HDMI cables
(20 meters at 1080p)
Fully buffered unidirectional inputs/outputs
Globally switchable, 50 Ω on-chip terminations
Pre-emphasized outputs
Low added jitter
Single-supply operation (3.3 V)
Four auxiliary channels per link
Bidirectional unbuffered inputs/outputs
Flexible supply operation (3.3 V to 5 V)
HDCP standard compatible
Allows switching of DDC bus and two additional signals
Multiple channel bundling modes
1x (4:1) HDMI/DVI link switch (default)
2x (8:1) TMDS channel and auxiliary signal switch
1x (16:1) TMDS channel and auxiliary signal switch
Output disable feature
Reduced power dissipation
Removable output termination
Allows building of larger arrays
Two AD8191s support HDMI/DVI dual-link
Standards compatible: HDMI receiver, DVI, HDCP
Serial (I2C® slave) and parallel control interface
100-lead, 14 mm × 14 mm LQFP, Pb-free package
APPLICATIONS
Multiple input displays
Projectors
A/V receivers
Set-top boxes
Advanced television (HDTV) sets
GENERAL DESCRIPTION
The AD8191 is a HDMI/DVI switch featuring equalized TMDS
inputs and pre-emphasized TMDS outputs, ideal for systems
with long cable runs. Outputs can be set to a high impedance
state to reduce the power dissipation and/or allow the construc-
tion of larger arrays using the wire-OR technique. Flexible
channel bundling modes (for both the TMDS channels and the
auxiliary signals) allow the AD8191 to be configured as a 4:1 single
HDMI/DVI link switch, a dual 8:1 switch, or a single 16:1 switch.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
FUNCTIONAL BLOCK DIAGRAM
PARALLEL
SERIAL
2
2
I2C_SDA
I2C_SCL
I2C_ADDR[2:0]
VTTI
3
CONFIG
INTERFACE
RESET
CONTROL
LOGIC
AD8191
AVCC
DVCC
AMUXVCC
AVEE
DVEE
IP_A[3:0] +
IN_A[3:0]
IP_B[3:0] +
IN_B[3:0]
IP_C[3:0] +
IN_C[3:0]
IP_D[3:0] +
IN_D[3:0]
VTTI
AUX_A[3:0]
AUX_B[3:0]
AUX_C[3:0]
AUX_D[3:0]
4
4
4
4
4
4 EQ
4
4
SWITCH
CORE
PE
4
4
HIGH SPEED BUFFERED
VTTO
+ OP[3:0]
ON[3:0]
4
4
4
SWITCH
CORE
4
4
LOW SPEED UNBUFFERED
BIDIRECTIONAL
Figure 1.
AUX_COM[3:0]
TYPICAL APPLICATION
MEDIA CENTER
HDTV SET
GAME CONSOLE
SET-TOP BOX
HDMI
RECEIVER
AD8191
DVD PLAYER
01:18
Figure 2. Typical HDTV Application
The AD8191 is provided in a 100-lead LQFP, Pb-free, surface
mount package specified to operate over the −40°C to +85°C
temperature range.
PRODUCT HIGHLIGHTS
1. Supports data rates up to 1.65 Gbps, enabling 1080p HDMI
formats and UXGA (1600 × 1200) DVI resolutions.
2. Input cable equalizer enables use of long cables at the input
(more than 20 meters of 24 AWG cable at 1080p).
3. Auxiliary switch routes a DDC bus and two additional signals
for a single-chip, HDMI 1.2a receive-compliant solution.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
DataSheet4 U .com




 AD8191
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AD8191
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
Typical Application........................................................................... 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
Maximum Power Dissipation ..................................................... 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 9
Theory of Operation ...................................................................... 13
Introduction ................................................................................ 13
Input Channels............................................................................ 13
Output Channels ........................................................................ 13
High Speed (TMDS) Switching Modes ................................... 14
Auxiliary Switch.......................................................................... 14
Auxiliary (Low Speed) Switching Modes ................................ 15
Serial Control Interface.................................................................. 16
Reset ............................................................................................. 16
REVISION HISTORY
10/06—Revision 0: Initial Version
Write Procedure.......................................................................... 16
Read Procedure........................................................................... 17
Parallel Control Interface .............................................................. 18
Serial Interface Configuration Registers ..................................... 19
High Speed Device Modes Register......................................... 19
Auxiliary Device Modes Register............................................. 20
Receiver Settings Register ......................................................... 22
Input Termination Pulse Register 1 and Register 2 ............... 22
Receive Equalizer Register 1 and Register 2 ........................... 22
Transmitter Settings Register.................................................... 22
Parallel Interface Configuration Registers .................................. 23
High Speed Device Modes Register......................................... 23
Auxiliary Device Modes Register............................................. 23
Receiver Settings Register ......................................................... 24
Input Termination Pulse Register 1 and Register 2 ............... 24
Receive Equalizer Register 1 and Register 2 ........................... 24
Transmitter Settings Register.................................................... 24
Application Notes ........................................................................... 25
Pinout........................................................................................... 25
Cable Lengths and Equalization............................................... 25
PCB Layout Guidelines.............................................................. 26
Outline Dimensions ....................................................................... 30
Ordering Guide .......................................................................... 30
DataSheet4 U .com
Rev. 0 | Page 2 of 32




 AD8191
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AD8191
SPECIFICATIONS
TA = 27°C, AVCC = 3.3 V, VTTI = 3.3 V, VTTO = 3.3 V, DVCC = 3.3 V, AMUXVCC = 5 V, AVEE = 0 V, DVEE = 0 V, differential input
swing = 1000 mV, TMDS outputs terminated with external 50 Ω resistors to 3.3 V, unless otherwise noted.
Table 1.
Parameter
DYNAMIC PERFORMANCE
Maximum Data Rate (DR) per Channel
Bit Error Rate (BER)
Added Deterministic Jitter
Added Random Jitter
Differential Intrapair Skew
Differential Interpair Skew1
EQUALIZATION PERFORMANCE
Receiver (Highest Setting)2
Transmitter (Highest Setting)3
INPUT CHARACTERISTICS
Input Voltage Swing
Input Common-Mode Voltage (VICM)
OUTPUT CHARACTERISTICS
High Voltage Level
Low Voltage Level
Rise/Fall Time (20% to 80%)
INPUT TERMINATION
Resistance
AUXILIARY CHANNELS
On Resistance, RAUX
On Capacitance, CAUX
Input/Output Voltage Range
POWER SUPPLY
AVCC
QUIESCENT CURRENT
AVCC
VTTI
VTTO
DVCC
AMUXVCC
POWER DISSIPATION
TIMING CHARACTERISTICS
Switching/Update Delay
RESET Pulse Width
Conditions/Comments
NRZ
PRBS 223 − 1
DR ≤ 1.65 Gbps, PRBS 223 − 1
At output
At output
Boost frequency = 825 MHz
Boost frequency = 825 MHz
Differential
Single-ended high speed channel
Single-ended high speed channel
Single-ended
DC bias = 2.5 V, ac voltage = 3.5 V, f = 100 kHz
Operating range
Outputs disabled
Outputs enabled, no pre-emphasis
Outputs enabled, maximum pre-emphasis
Input termination on4
Output termination on, no pre-emphasis
Output termination on, maximum
pre-emphasis
Outputs disabled
Outputs enabled, no pre-emphasis
Outputs enabled, maximum pre-emphasis
High speed switching register: HS_CH
All other configuration registers
Min
Typ Max
Unit
1.65 Gbps
10−9
40 ps (p-p)
2 ps (rms)
1 ps
40 ps
12 dB
6 dB
150
AVCC − 800
1200
AVCC
mV
mV
AVCC − 10
AVCC + 10 mV
AVCC − 600
AVCC − 400 mV
75
135 200
ps
DVEE
3
30
48
88
5
35
72
3.2
115
384
704
50
50 Ω
100
8
AMUXVCC
Ω
pF
V
3.3 3.6
V
40 44
60 64
100 110
40 54
40 46
80 90
78
0.01 0.1
mA
mA
mA
mA
mA
mA
mA
mA
271 361
574 671
910 1050
mW
mW
mW
200 ms
1.5 ms
ns
DataSheet4 U .com
Rev. 0 | Page 3 of 32



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