I/O Port. CAT9555 Datasheet

CAT9555 Port. Datasheet pdf. Equivalent


Part CAT9555
Description 16-Bit I2C and SMBus I/O Port
Feature www.DataSheet4U.com CAT9555 16-bit I2C and SMBus I/O Port with Interrupt FEATURES I 400kHz I2C bus .
Manufacture Catalyst Semiconductor
Datasheet
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www.DataSheet4U.com CAT9555 16-bit I2C and SMBus I/O Port w CAT9555 Datasheet
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CAT9555
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CAT9555
16-bit I2C and SMBus I/O Port with Interrupt
FEATURES
I 400kHz I2C bus compatible*
I 2.3V to 5.5V operation
I Low stand-by current
I 5V tolerant I/Os
I 16 I/O pins that default to inputs at power-up
I High drive capability
I Individual I/O configuration
I Polarity inversion register
I Active low interrupt output
I Internal power-on reset
I No glitch on power-up
I Noise filter on SDA/SCL inputs
I Cascadable up to 8 devices
I Industrial temperature range
I RoHS-compliant 24-lead SOIC and TSSOP, and
24-pad TQFN (4 x 4 mm) packages
APPLICATIONS
I White goods (dishwashers, washing machines)
I Handheld devices (cell phones, PDAs, digital
cameras)
I Data Communications (routers, hubs and
servers)
DESCRIPTION
The CAT9555 is a CMOS device that provides 16-bit
parallel input/output port expansion for I2C and SMBus
compatible applications. These I/O expanders provide
a simple solution in applications where additional I/Os
are needed: sensors, power switches, LEDs,
pushbuttons, and fans.
The CAT9555 consists of two 8-bit Configuration ports
(input or output), Input, Output and Polarity inversion
registers, and an I2C/SMBus-compatible serial interface.
Any of the sixteen I/Os can be configured as an input or
output by writing to the configuration register. The system
master can invert the CAT9555 input data by writing to
the active-high polarity inversion register.
The CAT9555 features an active low interrupt output
which indicates to the system master that an input state
has changed.
The three address input pins provide the device's
extended addressing capability and allow up to eight
devices to share the same bus. The fixed part of the I2C
slave address is the same as the CAT9554, allowing up
to eight of these devices in any combination to be
connected on the same bus.
For Ordering Information details, see page 16.
BLOCK DIAGRAM
A0
A1
A2
SCL
SDA
VCC
VCC
INPUT
FILTER
POWER-ON
RESET
I2C/SMBUS
CONTROL
8-BIT
INPUT/
OUTPUT
PORTS
WRITE pulse
READ pulse
I/O1.0
I/O1.1
I/O1.2
I/O1.3
I/O1.4
I/O1.5
I/O1.6
I/O1.7
8-BIT
WRITE pulse
READ pulse
INPUT/
OUTPUT
PORTS
LP FILTER
~
I/O0.0
I/O0.1
I/O0.2
I/O0.3
I/O0.4
I/O0.5
I/O0.6
I/O0.7
VINT
INT
NOTE: ALL I/Os ARE SET TO INPUTS AT RESET
* Catalyst Semiconductor is licensed by Philips Corporation to carry the I2C Bus Protocol.
© 2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. 8551, Rev. D



CAT9555
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CAT9555
PIN CONFIGURATION
SOIC (W) / TSSOP (Y)
TQFN (HV6)
INT 1
A1 2
24 VCC
23 SDA
A2 3
22 SCL
I/O0.0 4
21 A0
I/O0.1 5
20 I/O1.7
I/O0.2 6
19 I/O1.6
I/O0.3 7
19 I/O1.5
I/O0.4 8
17 I/O1.4
I/O0.5 9
16 I/O1.3
I/O0.6 10 15 I/O1.2
I/O0.7 11 14 I/O1.1
VSS 12 13 I/O1.0
PIN DESCRIPTION
SOIC / TSSOP
1
2
3
4-11
12
13-20
21
22
23
24
I/O0.0 1
I/O0.1 2
I/O0.2 3
I/O0.3 4
I/O0.4 5
I/O0.5 6
18 A0
17 I/O1.7
16 I/O1.6
15 I/O1.5
14 I/O1.4
13 I/O1.3
TQFN
22
23
24
1-8
9
10-17
18
19
20
21
4 x 4 mm
Top View
PIN NAME
INT
A1
A2
I/O0.0 - I/O0.7
VSS
I/O1.0 - I/O1.7
A0
SCL
SDA
VCC
FUNCTION
Interrupt Output (open drain)
Address Input 1
Address Input 2
I/O Port 0.0 to I/O Port 0.7
Ground
I/O Port 1.0 to I/O Port 1.7
Address Input 0
Serial Clock
Serial Data
Power Supply
Doc. No. 8551, Rev. D
2
© 2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice







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