TIME SLOT INTERCHANGE
128 x 128
• 128 x 128 channel non-blocking switch
• Serial Telecom Bus Compatible (ST-BUS®)
• 4 RX inputs—32 channels at 64 Kbit/s per serial line
• 4 TX output—32 channels at 64 Kbit/s per serial line
• Three-state serial outputs
• Microprocessor Interface (8-bit data bus)
• 5V Power Supply
• Available in 44-pin Plastic Leaded Chip Carrier (PLCC), 40-pin
Plastic Dip (P-DIP) and 44-pin Plastic Quad Flatpack (PQFP)
• Operating Temperature Range -40°C to +85°C
The IDT728981 is a ST-BUS® compatible digital switch controlled by a
microprocessor. The IDT728981 can handle as many as 128, 64 Kbit/s input
and output channels. Those 128 channels are divided into 4 serial inputs and
outputs, each of which consists of 32 channels (64 Kbit/s per channel) to form
a multiplexed 2.048 Mb/s stream.
A functional block diagram of the IDT728981 device is shown below. The
wide frames each containing 32, 8-bit channels. Four input (RX0-3) and four
output (TX0-3) serial streams are provided in the IDT728981 device allowing
a complete 128 x 128 channel non-blocking switch matrix to be constructed.
The serial interface (C4i) clock for the device is 4.096 MHz.
The received serial data is internally converted to a parallel format by the on
chip serial-to-parallel converters and stored sequentially in a 128-position Data
Memory. By using an internal counter that is reset by the input 8 KHz frame pulse,
F0i, the incoming serial data streams can be framed and sequentially ad-
.UNCTIONAL BLOCK DIAGRAM
C4i F0i VCC GND
RX1 Serial Data
DS CS R/W A0/ DTA D0/
2001 Integrated Device Technology, Inc.