KM641003C SRAM Datasheet

KM641003C Datasheet, PDF, Equivalent


Part Number

KM641003C

Description

CMOS SRAM

Manufacture

Samsung Semiconductor

Total Page 8 Pages
Datasheet
Download KM641003C Datasheet


KM641003C
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KM641003C
PRELIMINARY
PRELIMINARY
CMOS SRAM
Document Title
256Kx4 Bit (with OE) High-Speed CMOS Static RAM(5.0V Operating).
Revision History
Rev.No.
History
Rev. 0.0
Initial release with Preliminary.
Rev. 1.0
Release to Final Data Sheet.
1.1. Delete Preliminary.
CCPCCCRCPEreLlIiMmIiNnAarRyY
Draft Data
Aug. 5. 1998
Mar. 3. 1999
Remark
Preliminary
Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-
tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
-1-
Revision 1.0
March 1999

KM641003C
www.DataSheet4U.com
KM641003C
PRELIMINARY
PRELIMINARY
CMOS SRAM
256K x 4 Bit (with OE) High-Speed CMOS Static RAM
FEATURES
• Fast Access Time 12,15,20ns(Max.)
• Low Power Dissipation
Standby (TTL) : 30mA(Max.)
(CMOS) : 5mA(Max.)
Operating KM641003C - 12 : 70mA(Max.)
KM641003C - 15 : 68mA(Max.)
KM641003C - 20 : 65mA(Max.)
• Single 5.0V±10% Power Supply
• TTL Compatible Inputs and Outputs
• I/O Compatible with 3.3V Device
• Fully Static Operation
- No Clock or Refresh required
• Three State Outputs
• Center Power/Ground Pin Configuration
• Standard Pin Configuration :
KM641003CJ : 32-SOJ-400
GENERAL DESCRIPTION
The KM641003C is a 1,048,576-bit high-speed Static Random
CCPCCCRCPEreLlIiMmIiNnAarRyYAccess Memory organized as 262,144 words by 4 bits. The
KM641003C uses 4 common input and output lines and has an
output enable pin which operates faster than address access
time at read cycle. The device is fabricated using SAMSUNGs
advanced CMOS process and designed for high-speed circuit
technology. It is particularly well suited for use in high-density
high-speed system applications. The KM641003C is packaged
in a 400 mil 32-pin plastic SOJ.
PIN CONFIGURATION(Top View)
FUNCTIONAL BLOCK DIAGRAM
Clk Gen.
A0
A1
A2
A3
A4
A5
A6
A7
A8
I/O1 ~ I/O4
Data
Cont.
Pre-Charge Circuit
Memory Array
512 Rows
512x4 Columns
I/O Circuit &
Column Select
CLK
Gen.
A9 A10 A11 A12 A13 A14 A15 A16 A17
CS
WE
OE
N.C 1
A0 2
A1 3
A2 4
A3 5
CS 6
I/O1 7
Vcc 8
Vss 9
I/O2 10
WE 11
A4 12
A5 13
A6 14
A7 15
N.C 16
SOJ
32 A17
31 A16
30 A15
29 A14
28 A13
27 OE
26 I/O4
25 Vss
24 Vcc
23 I/O3
22 A12
21 A11
20 A10
19 A9
18 A8
17 N.C
PIN FUNCTION
Pin Name
A0 - A17
WE
CS
OE
I/O1 ~ I/O4
VCC
VSS
N.C
Pin Function
Address Inputs
Write Enable
Chip Select
Output Enable
Data Inputs/Outputs
Power(+5.0V)
Ground
No Connection
-2-
Revision 1.0
March 1999


Features www.DataSheet4U.com PRELIMINARY PRELIMI NARY CMOS SRAM KM641003C Document Titl e 256Kx4 Bit (with OE) High-Speed CMOS Static RAM(5.0V Operating). Revision H istory Rev. No. Rev. 0.0 Rev. 1.0 Histo ry Initial release with Preliminary. Re lease to Final Data Sheet. 1.1. Delete Preliminary. Preliminary CCPCCCRCELIMI NARY Draft Data Aug. 5. 1998 Mar. 3. 19 99 Remark Preliminary Final The attach ed data sheets are prepared and approve d by SAMSUNG Electronics. SAMSUNG Elect ronics CO., LTD. reserve the right to c hange the specifications. SAMSUNG Elect ronics will evaluate and reply to your requests and questions on the parameter s of this device. If you have any quest ions, please contact the SAMSUNG branch office near your office, call or conta ct Headquarters. -1- Revision 1.0 Mar ch 1999 www.DataSheet4U.com PRELIMINA RY PRELIMINARY CMOS SRAM GENERAL DESCRI PTION KM641003C 256K x 4 Bit (with OE) High-Speed CMOS Static RAM FEATURES Fast Access Time 12,15,20ns(Max.) • Low Power Dissipation Stand.
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