74VCX1632245 TRANSLATOR Datasheet

74VCX1632245 Datasheet, PDF, Equivalent


Part Number

74VCX1632245

Description

16-BIT DUAL SUPPLY BUS TRANSCEIVER LEVEL TRANSLATOR

Manufacture

ST Microelectronics

Total Page 18 Pages
Datasheet
Download 74VCX1632245 Datasheet


74VCX1632245
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74VCX1632245
16-BIT DUAL SUPPLY BUS TRANSCEIVER
LEVEL TRANSLATOR WITH A SIDE SERIES RESISTOR
I HIGH SPEED: tPD = 4.4ns (MAX.) at TA=85°C
VCCA = 3.0V VCCB = 2.3V
I LOW POWER DISSIPATION:
ICCA = ICCB = 20µA(MAX.) at TA=85°C
I SYMMETRICAL OUTPUT IMPEDANCE:
|IOHA| = IOLA = 8mA MIN at
VCCA = 3.0V VCCB = 1.65V or 2.3V
|IOHA| = IOLA = 18mA MIN at
VCCA = 2.3V VCCB = 1.65V)
I BALANCED PROPAGATION DELAYS:
tPLH tPHL
I POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
I 26SERIES RESISTOR ON A SIDE OUTPUTS
I OPERATING VOLTAGE RANGE:
VCCA(OPR) = 2.3V to 3.6V (1.2V Data
Retention)
VCCB(OPR) = 1.65V to 2.7V (1.2V Data
Retention)
I MAX DATA RATES:
380 Mbps (1.8V to 3.3V translation)
260 Mbps (<1.8V to 3.3V translation)
260 Mbps (Translate to 2.5V)
210 Mbps (Translate to 1.5V)
100 Mbps (Translate to 1.2V)
I PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 16245
I LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
I ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74VCX1632245 is a dual supply low voltage
CMOS 16-BIT BUS TRANSCEIVER fabricated
with sub-micron silicon gate and five-layer metal
wiring C2MOS technology. Designed for use as an
interface between a 3.3V bus and a 2.5V or 1.8V
bus in a mixed 3.3V/1.8V,3.3V/2.5V and 2.5V/
1.8V supply systems, it achieves high speed
operation while maintaining the CMOS low power
dissipation.
This IC is intended for two-way asynchronous
communication between data buses and the
direction of data transmission is determined by
nDIR inputs. The enable inputs nG can be used to
disable the device so that the buses are effectively
March 2005
TSSOP
TFBGA
µTFBGA
Table 1: Order Codes
PACKAGE
TSSOP48
TFBGA54
µTFBGA42
T&R
74VCX1632245TTR
74VCX1632245LBR
74VCX1632245TBR
isolated. The A-port interfaces with the 3V bus, the
B-port with the 2.5V and 1.8V bus.
All inputs are equipped with protection circuits
against static discharge, giving them 2KV ESD im-
munity and transient excess voltage. All floating
bus terminals during High Z State must be held
HIGH or LOW.
Figure 1: Logic Diagram
n = 1, 2
Rev. 14
1/18

74VCX1632245
74VCX1632245
Figure 2: Input And Output Equivalent Circuit
Table 2: Pin Description
TFBGA54 PIN°
A3
J3
A6, B5, B6, C5,
C6, D5, D6, E5
E6, F5, F6, G5,
G6, H5, H6, J6
A1, B2, B1, C2,
C1, D2, D1, E2
E1, F2, F1, G2,
G1, H2, H1, J1
J4
A4
D3, D4, E3, E4,
F3, F4
A2, A5, B3, B4,
H3, H4, J2, J5
C4, G4
C3, G3
µTFBGA42 PIN N°
B3
F3
A4, A5, A6, B5,
B6, C5, C6, D5
D6, E5, E6, F5,
F6, G4, G5, G6
A3, A2, A1, B2,
B1, C2, C1, D2
D1, E2, E1, F2,
F1, G3, G2, G1
F4
B4
C3, C4, E3, E4
-
D4
D3
TSSOP PIN N°
1
24
47, 46, 44, 43,
41, 40, 38, 37
36, 35, 33, 32,
30, 29, 27, 26
2, 3, 5, 6,
8, 9, 11, 12
13, 14, 16, 17,
19, 20, 22, 23
25
48
4, 10, 15, 21,
28, 34, 39, 45
-
SYMBOL
NAME AND FUNCTION
1DIR
Directional Controls
2DIR
Directional Controls
1A1, 1A2, 1A3, 1A4, Data Inputs/Outputs
1A5, 1A6, 1A7, 1A8
2A1, 2A2, 2A3, 2A4, Data Inputs/Outputs
2A5, 2A6, 2A7, 2A8
1B1, 1B2, 1B3, 1B4, Data Inputs/Outputs
1B5, 1B6, 1B7, 1B8
2B1, 2B2, 2B3, 2B4, Data Inputs/Outputs
2B5, 2B6, 2B7, 2B8
G2 Output Enable Inputs
G1 Output Enable Inputs
GND
Ground (0V)
NC No Connected
42, 31
7, 18
VCCA
VCCB
Positive Supply Voltage
Positive Supply Voltage
2/18


Features www.DataSheet4U.com 74VCX1632245 16-BIT DUAL SUPPLY BUS TRANSCEIVER LEVEL TRAN SLATOR WITH A SIDE SERIES RESISTOR I I I I I I I I I I I HIGH SPEED: tPD = 4.4ns (MAX.) at TA=85°C VCCA = 3.0V VCCB = 2.3V LOW POWER DISSIPATION: ICCA = ICCB = 20µA(MAX.) at TA=85°C SYMME TRICAL OUTPUT IMPEDANCE: |IOHA| = IOLA = 8mA MIN at VCCA = 3.0V VCCB = 1.65V o r 2.3V |IOHA| = IOLA = 18mA MIN at VCCA = 2.3V VCCB = 1.65V) BALANCED PROPAGAT ION DELAYS: tPLH ≅ tPHL POWER DOWN PR OTECTION ON INPUTS AND OUTPUTS 26Ω SE RIES RESISTOR ON A SIDE OUTPUTS OPERATI NG VOLTAGE RANGE: VCCA(OPR) = 2.3V to 3 .6V (1.2V Data Retention) VCCB(OPR) = 1 .65V to 2.7V (1.2V Data Retention) MAX DATA RATES: 380 Mbps (1.8V to 3.3V tran slation) 260 Mbps (<1.8V to 3.3V transl ation) 260 Mbps (Translate to 2.5V) 210 Mbps (Translate to 1.5V) 100 Mbps (Tra nslate to 1.2V) PIN AND FUNCTION COMPAT IBLE WITH 74 SERIES 16245 LATCH-UP PERF ORMANCE EXCEEDS 500mA (JESD 17) ESD PER FORMANCE: HBM > 2000V (MIL STD 883 method 3015); MM > 200V TSSOP TFB.
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