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VSC835

Vitesse Semiconductor
Part Number VSC835
Manufacturer Vitesse Semiconductor
Description 34x34 Crosspoint Switch
Published Feb 22, 2007
Detailed Description www.DataSheet4U.com VITESSE SEMICONDUCTOR CORPORATION Datasheet VSC835 Features • 34 Input by 34 Output Crosspoint Sw...
Datasheet PDF File VSC835 PDF File

VSC835
VSC835



Overview
www.
DataSheet4U.
com VITESSE SEMICONDUCTOR CORPORATION Datasheet VSC835 Features • 34 Input by 34 Output Crosspoint Switch • 2.
5 Gbits/sec.
NRZ Data Bandwidth • TTL Compatible µP Interface • Differential PECL Data Inputs • On-chip 50Ω Input Terminations 2.
5 Gbits/sec 34x34 Crosspoint Switch with Signal Detection • 50Ω Source Terminated PECL Output Drivers • Single 3.
3V Supply • 14W Maximum Power Dissipation • High Performance 256 BGA Package General Description The VSC835 is a monolithic 34x34 asynchronous crosspoint switch, designed to carry broadband data streams at up to 2.
5 Gbit/s.
The non-blocking switch core is programmed through a parallel port interface that allows random access programming of each output port.
A high degree of signal integrity is maintained through the chip through fully differential signal paths.
The crosspoint function is based on a multiplexer tree architecture.
Each data output is driven by a 34:1 multiplexer tree that can be programmed to one and only one of its 34 inputs, and each data input can be routed to multiple outputs.
The signal path is unregistered, so no clock is required for the data inputs.
The signal path is asynchronous, so there are no restrictions on the phase, frequency, or signal pattern at each input.
Each input channel and each output channel has an signal monitor function that can be used to identify loss of activity (LOA).
An interrupt pin is provided to signal LOA, after which an external controller can query the chip to determine the channel(s) on which the fault occurred.
Each output driver is a fully differential switched current driver with on-die back-terminations for maximum signal integrity.
Data inputs are terminated on die through 50 ohm resistors terminated to VTERM.
The parallel interface uses TTL levels, and provides address, data, and control pins that are compatible with a microprocessor-style interface.
The control port provides access to all chip functions, including LOA and programming.
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