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54ACT112 Datasheet, Equivalent, Edge-Triggered Flip-Flop.

Dual JK Negative Edge-Triggered Flip-Flop

Dual JK Negative Edge-Triggered Flip-Flop

 

 

 

Part 54ACT112
Description Dual JK Negative Edge-Triggered Flip-Flop
Feature www.
DataSheet4U.
com 54ACT112 Dual JK Ne gative Edge-Triggered Flip-Flop Septem ber 1998 54ACT112 Dual JK Negative Edg e-Triggered Flip-Flop General Descripti on The ’ACT112 contains two independe nt, high-speed JK flip-flops with Direc t Set and Clear inputs.
Synchronous sta te changes are initiated by the falling edge of the clock.
Triggering occurs a t a voltage level of the clock and is n ot directly related to the transition t ime.
The J and K inputs can change when the clock is in either state without a ffecting the flip-flop, provided that t hey are in the desired state during the recommended set .
Manufacture National Semiconductor
Datasheet
Download 54ACT112 Datasheet
Part 54ACT112
Description Dual JK Negative Edge-Triggered Flip-Flop
Feature www.
DataSheet4U.
com 54ACT112 Dual JK Ne gative Edge-Triggered Flip-Flop Septem ber 1998 54ACT112 Dual JK Negative Edg e-Triggered Flip-Flop General Descripti on The ’ACT112 contains two independe nt, high-speed JK flip-flops with Direc t Set and Clear inputs.
Synchronous sta te changes are initiated by the falling edge of the clock.
Triggering occurs a t a voltage level of the clock and is n ot directly related to the transition t ime.
The J and K inputs can change when the clock is in either state without a ffecting the flip-flop, provided that t hey are in the desired state during the recommended set .
Manufacture National Semiconductor
Datasheet
Download 54ACT112 Datasheet

54ACT112

54ACT112
54ACT112

54ACT112

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