A49FL004 Flash Memory Datasheet

A49FL004 Datasheet, PDF, Equivalent


Part Number

A49FL004

Description

4 Mbit CMOS 3.3Volt-only Firmware Hub/LPC Flash Memory

Manufacture

AMIC Technology

Total Page 30 Pages
Datasheet
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A49FL004
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Preliminary
A49FL004
4 Mbit CMOS 3.3Volt-only Firmware Hub/LPC Flash Memory
Document Title
4 Mbit CMOS 3.3 Volt-only Firmware Hub/LPC Flash Memory
Revision History
Rev. No. History
0.0 Initial issue
Issue Date
September 23, 2005
Remark
Preliminary
PRELIMINARY (September, 2005, Version 0.0)
AMIC Technology, Corp.

A49FL004
Preliminary
A49FL004
4 Mbit CMOS 3.3Volt-only Firmware Hub/LPC Flash Memory
FEATURES
• Single Power Supply Operation
- Low voltage range: 3.0 V - 3.6 V
• Standard Intel Firmware Hub/LPC Interface
- Read compatible to Intel® 82802 Firmware
Hub devices
- Conforms to Intel LPC Interface Specification
Revision 1.1
• Memory Configuration
- 512K x 8 (4 Mbit)
Block Architecture
- Uniform 4 KBytes Sectors
- Uniform 64 KByte overlay blocks
- Support full chip erase for Address/Address
Multiplexed (A/A Mux) mode
Automatic Erase and Program Operation
- Build-in automatic program verification for extended
product endurance
- Typical 10 µs/byte programming time
- Typical x s sector erase time
- Typical y s block erase time
- Typical z s chip erase time
• Two Configurable Interfaces
- In-System hardware interface: Auto detection of
Firmware Hub (FWH) or Low Pin Count (LPC)
Interface for in-system read and write operations
- Address/Address Multiplexed (A/A Mux) Interface for
programming on EPROM Programmers during
manufacturing
• Firmware Hub (FWH)/Low Pin Count (LPC) Mode
- 33 MHz synchronous operation with PCI bus
- 5-signal communication interface for in-system read
and write operations
- Standard SDP Command Set
- Data Polling and Toggle Bit features
- Block Locking Register for all blocks
- Register-based read and write protection for
each block
- 4 ID pins for multiple chips selection
- 5 GPI pins for General Purpose Input Register
- TBL pin for hardware write protection to Boot Block
- WP pin for hardware write protection to whole memory
array except Boot Block
• Address/Address Multiplexed (A/A Mux) Mode
- 11-pin multiplexed address and 8-pin data I/O interface
- Supports fast programming on EPROM programmers
- Standard SDP Command Set
- Data Polling and Toggle Bit features
• Lower Power Consumption
- Typical 12mA active read current
- Typical 17mA program/erase current
High Product Endurance
- Guarantee 100,000 program/erase cycles per single
sector (preliminary)
- Minimum 20 years data retention
• Compatible Pin-out and Packaging
- 32-pin (8 mm x 14 mm) TSOP
- 32-pin PLCC
- Optional lead-free (Pb-free) package
• Hardware Data Protection
PRELIMINARY (September, 2005, Version 0.0)
1
AMIC Technology, Corp.


Features www.DataSheet4U.com A49FL004 4 Mbit CMO S 3.3Volt-only Firmware Hub/LPC Flash M emory Preliminary Document Title 4 Mbit CMOS 3.3 Volt-only Firmware Hub/LPC Fl ash Memory Revision History Rev. No. 0. 0 History Initial issue Issue Date Se ptember 23, 2005 Remark Preliminary P RELIMINARY (September, 2005, Version 0 .0) AMIC Technology, Corp. A49FL004 4 Mbit CMOS 3.3Volt-only Firmware Hub/LP C Flash Memory Preliminary FEATURES • Single Power Supply Operation Low volt age range: 3.0 V - 3.6 V • Standard I ntel Firmware Hub/LPC Interface Read co mpatible to Intel® 82802 Firmware Hub devices Conforms to Intel LPC Interface Specification Revision 1.1 • Memory Configuration 512K x 8 (4 Mbit) • Blo ck Architecture Uniform 4 KBytes Sector s Uniform 64 KByte overlay blocks Suppo rt full chip erase for Address/Address Multiplexed (A/A Mux) mode • Automati c Erase and Program Operation Build-in automatic program verification for exte nded product endurance Typical 10 µs/byte programming time Typical x s sec.
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