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CDP1833

CMOS 7-Bit Latch and Decoder Memory Interface

Description

www.DataSheet4U.com CDP1883, CDP1883C March 1997 CMOS 7-Bit Latch and Decoder Memory Interfaces Description The CDP1883 is a CMOS 7-bit memory latch and decoder circuit intended for use in CDP1800-series microprocessor systems. It can serve as a direct interface between the multiplexed address bus of this system and up to four 8K x 8-bit memories to implem...

Intersil

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