X4045 Supervisor Datasheet

X4045 Datasheet, PDF, Equivalent


Part Number

X4045

Description

(X4043 / X4045) CPU Supervisor

Manufacture

Intersil Corporation

Total Page 24 Pages
Datasheet
Download X4045 Datasheet


X4045
®
Data Sheet
September 30, 2005
X4043, X4045
4k, 512 x 8 Bit
FN8118.1
CPU Supervisor with 4kbit EEPROM
FEATURES
• Selectable watchdog timer
• Low VCC detection and reset assertion
—Five standard reset threshold voltages
—Adjust low VCC reset threshold voltage using
special programming sequence
—Reset signal valid to VCC = 1V
• Low power CMOS
—<20µA max standby current, watchdog on
—<1µA standby current, watchdog OFF
—3mA active current
• 4kbits of EEPROM
—16-byte page write mode
—Self-timed write cycle
—5ms write cycle time (typical)
• Built-in inadvertent write protection
—Power-up/power-down protection circuitry
—Protect 0, 1/4, 1/2, all or 16, 32, 64 or 128 bytes
of EEPROM array with Block Lockprotection
• 400kHz 2-wire interface
• 2.7V to 5.5V power supply operation
www.DataSheet4U.com Available packages
—8 Ld SOIC
—8 Ld MSOP
—8 Ld PDIP
• Pb-free plus anneal available (RoHS compliant)
BLOCK DIAGRAM
DESCRIPTION
The X4043/45 combines four popular functions,
Power-on Reset Control, Watchdog Timer, Supply
Voltage Supervision, and Block Lock Protect Serial
EEPROM Memory in one package. This combination
lowers system cost, reduces board space require-
ments, and increases reliability.
Applying power to the device activates the power-on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscilla-
tor to stabilize before the processor can execute code.
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable
time out interval, the device activates the
RESET/RESET signal. The user selects the interval
from three preset values. Once selected, the interval
does not change, even after cycling the power.
The device’s low VCC detection circuitry protects the
user’s system from low voltage conditions, resetting the
system when VCC falls below the minimum VCC trip
point. RESET/RESET is asserted until VCC returns to
proper operating level and stabilizes. Five industry stan-
dard VTRIP thresholds are available, however, Intersil’s
unique circuits allow the threshold to be reprogrammed
to meet custom requirements or to fine-tune the thresh-
old for applications requiring higher precision.
WP
SDA
SCL
VCC
Watchdog Transition
Detector
Data
Register
Command
Decode &
Control
Logic
VCC Threshold
Reset logic
Protect Logic
Status
Register
EEPROM Array
VTRIP
+
-
Watchdog
Timer Reset
Reset &
Watchdog
Timebase
Power-on and
Low Voltage
Reset
Generation
RESET (X4043)
RESET (X4045)
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

X4045
X4043, X4045
Ordering Information
PART NUMBER RESET PART
PART NUMBER
PART
VCC
VTRIP
TEMP
(ACTIVE LOW)
MARKING RESET (ACTIVE HIGH) MARKING RANGE (V) RANGE (V) RANGE (°C)
PACKAGE
X4043S8-4.5A
X4043 AL X4045S8-4.5A
X4045 AL
4.5-5.5
4.5-4.75
0-70
8 Ld SOIC
X4043S8Z-4.5A (Note) X4043 Z AL X4045S8Z-4.5A (Note) X4045 Z AL
0-70
8 Ld SOIC (Pb-free)
X4043S8I-4.5A
X4043 AM X4045S8I-4.5A
X4045 AM
-40-85 8 Ld SOIC
X4043S8IZ-4.5A (Note) X4043 Z AM X4045S8IZ-4.5A (Note) X4045 Z AM
-40-85 8 Ld SOIC (Pb-free)
X4043M8-4.5A
ADA
X4045M8-4.5A
ADJ
0-70
8 Ld MSOP
X4043M8Z-4.5A (Note) DAZ
X4045M8Z-4.5A (Note) DBH
0-70
8 Ld MSOP (Pb-free)
X4043M8I-4.5A
ADB
X4045M8I-4.5A
ADK
-40-85 8 Ld MSOP
X4043M8IZ-4.5A (Note) DAU
X4045M8IZ-4.5A (Note) DBE
-40-85 8 Ld MSOP (Pb-free)
X4043P-4.5A
X4043P AL X4045PZ-4.5A (Note) X4045P Z AL
0-70
8 Ld PDIP
X4043PZ-4.5A (Note) X4043P Z AL X4045P-4.5A
X4045P AL
0-70
8 Ld PDIP (Pb-free)
X4043PI-4.5A
X4043P AM X4045PI-4.5A
X4045P AM
-40-85 8 Ld PDIP
X4043PIZ-4.5A (Note) X4043P Z AM X4045PIZ-4.5A (Note) X4045P Z AM
-40-85 8 Ld PDIP (Pb-free)
X4043S8*
X4043S8Z* (Note)
X4043S8I*
X4043S8IZ* (Note)
X4043M8
X4043M8Z* (Note)
X4043M8I
X4043M8IZ (Note)
X4043P
X4043PZ (Note)
X4043PI
X4043PIZ (Note)
X4043
X4043 Z
X4043 I
X4043 Z I
ADC
DAW
ADD
DAR
X4043P Z
X4043P
X4043P I
X4043P Z I
X4045S8*
X4045S8Z* (Note)
X4045S8I
X4045S8IZ (Note)
X4045M8
X4045M8Z (Note)
X4045M8I
X4045M8IZ (Note)
X4045P
X4045PZ (Note)
X4045PI
X4045PIZ (Note)
X4045
X4045 Z
X4045 I
X4045 Z I
ADL
ADM
DBA
X4045P
X4045P Z
X4045P I
X4045P Z I
4.5-5.5
4.25-4.5
0-70
0-70
-40-85
-40-85
0-70
0-70
-40-85
-40-85
0-70
0-70
-40-85
-40-85
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld MSOP
8 Ld MSOP (Pb-free)
8 Ld MSOP
8 Ld MSOP (Pb-free)
8 Ld PDIP
8 Ld PDIP (Pb-free)
8 Ld PDIP
8 Ld PDIP (Pb-free)
X4043S8-2.7A*
X4043 AN X4045S8-2.7A
X4045 AN
X4043S8Z-2.7A* (Note) X4043 Z AN X4045S8Z-2.7A (Note) X4045 Z AN
X4043S8I-2.7A*
X4043 AP X4045S8I-2.7A
X4045 AP
X4043S8IZ-2.7A* (Note) X4043 Z AP X4045S8IZ-2.7A (Note) X4045 Z AP
X4043M8-2.7A
ADE
X4045M8-2.7A
AND
X4043M8Z-2.7A (Note) DAY
X4045M8Z-2.7A (Note) DBG
X4043M8I-2.7A
ADF
X4045M8I-2.7A
ADO
X4043M8IZ-2.7A (Note) DAT
X4045M8IZ-2.7A (Note) DBC
X4043P-2.7A
X4043P AN X4045P-2.7A
X4045P AN
X4043PZ-2.7A (Note) X4043P Z AN X4045PZ-2.7A (Note) X4045P Z AN
X4043PI-2.7A
X4043P AP X4045PI-2.7A
X4045P AP
X4043PIZ-2.7A (Note) X4043P Z AP X4045PIZ-2.7A (Note) X4045P Z AP
2.7-5.5
2.85-3.0
0-70
0-70
-40-85
-40-85
0-70
0-70
-40-85
-40-85
0-70
0-70
-40-85
-40-85
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld MSOP
8 Ld MSOP (Pb-free)
8 Ld MSOP
8 Ld MSOP (Pb-free)
8 Ld PDIP
8 Ld PDIP (Pb-free)
8 Ld PDIP
8 Ld PDIP (Pb-free)
2 FN8118.1
September 30, 2005


Features ® X4043, X4045 4k, 512 x 8 Bit Data Sh eet September 30, 2005 FN8118.1 CPU Su pervisor with 4kbit EEPROM FEATURES • Selectable watchdog timer • Low VCC detection and reset assertion —Five s tandard reset threshold voltages —Adj ust low VCC reset threshold voltage usi ng special programming sequence —Rese t signal valid to VCC = 1V • Low powe r CMOS —<20µA max standby current, w atchdog on —<1µA standby current, wa tchdog OFF —3mA active current • 4k bits of EEPROM —16-byte page write mo de —Self-timed write cycle —5ms wri te cycle time (typical) • Built-in in advertent write protection —Power-up/ power-down protection circuitry —Prot ect 0, 1/4, 1/2, all or 16, 32, 64 or 1 28 bytes of EEPROM array with Block Loc k™ protection • 400kHz 2-wire inter face • 2.7V to 5.5V power supply oper ation www.DataSheet4U.com • Available packages —8 Ld SOIC —8 Ld MSOP — 8 Ld PDIP • Pb-free plus anneal avail able (RoHS compliant) BLOCK DIAGRAM Watchdog Transition Detector WP SDA Data Register Command Decode & Control Log.
Keywords X4045, datasheet, pdf, Intersil Corporation, X4043, /, X4045, CPU, Supervisor, 4045, 045, 45, X404, X40, X4, Equivalent, stock, pinout, distributor, price, schematic, inventory, databook, Electronic, Components, Parameters, parts, cross reference, chip, Semiconductor, circuit, Electric, manual, substitute




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