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CPU Supervisor. X5169 Datasheet

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CPU Supervisor. X5169 Datasheet






X5169 Supervisor. Datasheet pdf. Equivalent




X5169 Supervisor. Datasheet pdf. Equivalent





Part

X5169

Description

(X5168 / X5169) CPU Supervisor



Feature


® X5168, X5169 (Replaces X25268, X2516 9) Data Sheet June 15, 2006 FN8130.2 C PU Supervisor with 16Kbit SPI EEPROM Th ese devices combine three popular funct ions, Power-on Reset Control, Supply Vo ltage Supervision, and Block Lock Prote ct Serial EEPROM Memory in one package. This combination lowers system cost, r educes board space requirements, and in creases reliability.
Manufacture

Intersil Corporation

Datasheet
Download X5169 Datasheet


Intersil Corporation X5169

X5169; . Applying power to the device activates the power-on reset circuit which holds RESET/RESET active for a period of tim e. This allows the power supply and osc illator to stabilize before the process or can execute code. The device’s low VCC detection circuitry protects the u ser’s system from low voltage conditi ons by holding RESET/RESET active when VCC falls below a mini.


Intersil Corporation X5169

mum VCC trip point. RESET/RESET remains asserted until VCC returns to proper op erating level and stabilizes. Five indu stry standard VTRIP thresholds are avai lable, however, Intersil’s unique cir cuits allow the threshold to be reprogr ammed to meet custom requirements or to fine-tune the threshold in application s requiring higher precision. Features • Low VCC Detection.


Intersil Corporation X5169

and Reset Assertion - Five standard res et threshold voltages - Re-program low VCC reset threshold voltage using speci al programming sequence - Reset signal valid to VCC = 1V • Long Battery Life with Low Power Consumption - <50µA ma x standby current, watchdog on - <1µA max standby current, watchdog off - <40 0µA max active current during read • 16Kbits of EEPROM • Buil.

Part

X5169

Description

(X5168 / X5169) CPU Supervisor



Feature


® X5168, X5169 (Replaces X25268, X2516 9) Data Sheet June 15, 2006 FN8130.2 C PU Supervisor with 16Kbit SPI EEPROM Th ese devices combine three popular funct ions, Power-on Reset Control, Supply Vo ltage Supervision, and Block Lock Prote ct Serial EEPROM Memory in one package. This combination lowers system cost, r educes board space requirements, and in creases reliability.
Manufacture

Intersil Corporation

Datasheet
Download X5169 Datasheet




 X5169
®
Data Sheet
X5168, X5169
(Replaces X25268, X25169)
June 15, 2006
FN8130.2
CPU Supervisor with 16Kbit SPI EEPROM
These devices combine three popular functions, Power-on
Reset Control, Supply Voltage Supervision, and Block Lock
Protect Serial EEPROM Memory in one package. This
combination lowers system cost, reduces board space
requirements, and increases reliability.
Applying power to the device activates the power-on reset
circuit which holds RESET/RESET active for a period of
time. This allows the power supply and oscillator to stabilize
before the processor can execute code.
The device’s low VCC detection circuitry protects the user’s
system from low voltage conditions by holding
RESET/RESET active when VCC falls below a minimum VCC
trip point. RESET/RESET remains asserted until VCC returns
to proper operating level and stabilizes. Five industry
standard VTRIP thresholds are available, however, Intersil’s
unique circuits allow the threshold to be reprogrammed to
meet custom requirements or to fine-tune the threshold in
applications requiring higher precision.
www.DataSheet4U.com
Block Diagram
WP
SI
SO
SCK
CS
Data
Register
Command
Decode &
Control
Logic
Features
• Low VCC Detection and Reset Assertion
- Five standard reset threshold voltages
- Re-program low VCC reset threshold voltage using
special programming sequence
- Reset signal valid to VCC = 1V
• Long Battery Life with Low Power Consumption
- <50µA max standby current, watchdog on
- <1µA max standby current, watchdog off
- <400µA max active current during read
• 16Kbits of EEPROM
• Built-in Inadvertent Write Protection
- Power-up/power-down protection circuitry
- Protect 0, 1/4, 1/2 or all of EEPROM array with Block
Lockprotection
- In circuit programmable ROM mode
• 2MHz SPI Interface Modes (0,0 & 1,1)
• Minimize EEPROM Programming Time
- 32-byte page write mode
- Self-timed write cycle
- 5ms write cycle time (typical)
• 2.7V to 5.5V and 4.5V to 5.5V Power Supply
Operation
• Available Packages
- 14 Ld TSSOP, 8 Ld SOIC, 8 Ld PDIP
• Pb-Free Plus Anneal Available (RoHS Compliant)
Protect Logic
Status
Register
4Kbits
4Kbits
8Kbits
VCC
VTRIP
+
-
Reset
Timebase
Power-on and
Low Voltage
Reset
Generation
RESET/RESET
X5168 = RESET
X5169 = RESET
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.




 X5169
X5168, X5169
Ordering Information
PART NUMBER
RESET
(ACTIVE LOW)
PART
MARKING
PART NUMBER
RESET
(ACTIVE HIGH)
PART
MARKING
X5168P-4.5A X5168P AL X5169P-4.5A X5169P AL
X5168PZ-4.5A X5168P Z AL X5169PZ-4.5A X5169P Z AL
(Note)
(Note)
X5168PI-4.5A X5168P AM X5169PI-4.5A X5169P AM
X5168PIZ-4.5A X5168P Z AM X5169PIZ-4.5A X5169P Z AM
(Note)
(Note)
X5168S8-4.5A X5168 AL X5169S8-4.5A X5169 AL
X5168S8Z-4.5A X5168 Z AL X5169S8Z-4.5A X5169 Z AL
(Note)
(Note)
X5168S8I-4.5A* X5168 AM X5169S8I-4.5A X5169 AM
X5168S8IZ-4.5A* X5168 Z AM X5169S8IZ-4.5A X5169 Z AM
(Note)
(Note)
X5168V14-4.5A X5168V AL X5169V14-4.5A X5169V AL
X5168V14Z-4.5A X5168V Z AL X5169V14Z-4.5A X5169V Z AL
(Note)
(Note)
X5168V14I-4.5A X5168V AM X5169V14I-4.5A X5169V AM
X5168V14IZ-4.5A X5168V Z AM X5169V14IZ-4.5A X5169V Z AM
(Note)
(Note)
X5168P
X5168P
X5169P
X5169P
X5168PZ (Note) X5168P Z X5169PZ (Note) X5169P Z
X5168PI
X5168P I
X5168PIZ (Note) X5168P Z I
X5169PI
X5169P I
X5169PIZ (Note) X5169P Z I
X5168S8*
X5168
X5169S8*
X5169
X5168S8Z*
(Note)
X5168 Z
X5169S8Z*
(Note)
X5169 Z
X5168S8I*
X5168 I
X5169S8I*
X5169 I
X5168S8IZ*
(Note)
X5168 Z I
X5169S8IZ*
(Note)
X5169 Z I
X5168V14*
X5168V
X5169V14*
X5169V
X5168V14Z*
(Note)
X5168V Z
X5169V14Z*
(Note)
X5169V Z
X5168V14I*
X5168V I
X5169V14I*
X5169V I
X5168V14IZ*
(Note)
X5168V Z I X5169V14IZ*
(Note)
X5169V Z I
X5168P-2.7A X5168P AN X5169P-2.7A X5169P AN
X5168PZ-2.7A X5168P Z AN X5169PZ-2.7A X5169P Z AN
(Note)
(Note)
X5168PI-2.7A X5168P AP X5169PI-2.7A X5169P AP
X5168PIZ-2.7A X5168P Z AP X5169PIZ-2.7A X5169P Z AP
(Note)
(Note)
X5168S8-2.7A* X5168 AN X5169S8-2.7A X5169 AN
X5168S8Z-2.7A* X5168 Z AN X5169S8Z-2.7A X5169 Z AN
(Note)
(Note)
X5168S8I-2.7A* X5168 AP X5169S8I-2.7A X5169 AP
X5168S8IZ-2.7A X5168 Z AP X5169S8IZ-2.7A X5169 Z AP
(Note)
(Note)
VCC RANGE VTRIP RANGE
TEMP
(V) (V) RANGE (°C) PACKAGE
PKG.
DWG #
4.5-5.5
4.5-4.75
0 to 70 8 Ld PDIP MDP0031
0 to 70
8 Ld PDIP** MDP0031
(Pb-free)
-40 to 85 8 Ld PDIP MDP0031
-40 to 85 8 Ld PDIP** MDP0031
(Pb-free)
0 to 70 8 Ld SOIC MDP0027
0 to 70
8 Ld SOIC
(Pb-free)
MDP0027
-40 to 85 8 Ld SOIC MDP0027
-40 to 85 8 Ld SOIC
(Pb-free)
MDP0027
0 to 70 14 Ld TSSOP M14.173
0 to 70
14 Ld TSSOP M14.173
(Pb-free)
-40 to 85 14 Ld TSSOP M14.173
-40 to 85 14 Ld TSSOP M14.173
(Pb-free)
4.5-5.5
4.25-4.5
0 to 70 8 Ld PDIP MDP0031
0 to 70
8 Ld PDIP** MDP0031
(Pb-free)
-40 to 85 8 Ld PDIP MDP0031
-40 to 85 8 Ld PDIP** MDP0031
(Pb-free)
0 to 70 8 Ld SOIC MDP0027
0 to 70
8 Ld SOIC
(Pb-free)
MDP0027
-40 to 85 8 Ld SOIC MDP0027
-40 to 85 8 Ld SOIC
(Pb-free)
MDP0027
0 to 70 14 Ld TSSOP M14.173
0 to 70
14 Ld TSSOP M14.173
(Pb-free)
-40 to 85 14 Ld TSSOP M14.173
-40 to 85 14 Ld TSSOP M14.173
(Pb-free)
2.7-5.5
2.85-3.0
0 to 70 8 Ld PDIP MDP0031
0 to 70
8 Ld PDIP** MDP0031
(Pb-free)
-40 to 85 8 Ld PDIP MDP0031
-40 to 85 8 Ld PDIP** MDP0031
(Pb-free)
0 to 70 8 Ld SOIC MDP0027
0 to 70
8 Ld SOIC
(Pb-free)
MDP0027
-40 to 85 8 Ld SOIC MDP0027
-40 to 85 8 Ld SOIC
(Pb-free)
MDP0027
2 FN8130.2
June 15, 2006




 X5169
X5168, X5169
Ordering Information (Continued)
PART NUMBER
RESET
(ACTIVE LOW)
PART
MARKING
PART NUMBER
RESET
(ACTIVE HIGH)
PART
VCC RANGE VTRIP RANGE
TEMP
MARKING
(V)
(V) RANGE (°C)
PACKAGE
PKG.
DWG #
X5168V14-2.7A X5168V AN X5169V14-2.7A X5168V AN
2.7-5.5
2.85-3.0
0 to 70 14 Ld TSSOP M14.173
X5168V14Z-2.7A X5168V Z AN X5169V14Z-2.7A X5169V Z AN
(Note)
(Note)
0 to 70
14 Ld TSSOP M14.173
(Pb-free)
X5168V14I-2.7A X5168V AP X5169V14I-2.7A X5169V AP
-40 to 85 14 Ld TSSOP M14.173
X5168V14IZ-2.7A X5168V Z AP X5169V14IZ-2.7A X5169V Z AP
(Note)
(Note)
-40 to 85 14 Ld TSSOP M14.173
(Pb-free)
X5168P-2.7
X5168P F X5169P-2.7
X5169P F
2.7-5.5
2.55-2.7
0 to 70 8 Ld PDIP MDP0031
X5168PZ-2.7
(Note)
X5168P Z F X5169PZ-2.7
(Note)
X5169P Z F
8 Ld PDIP** MDP0031
(Pb-free)
X5168PI-2.7
X5168P G X5169PI-2.7
X5169P G
-40 to 85 8 Ld PDIP MDP0031
X5168PIZ-2.7
(Note)
X5168P Z G X5169PIZ-2.7
(Note)
X5169P Z G
8 Ld PDIP** MDP0031
(Pb-free)
X5168S8-2.7* X5168 F
X5169S8-2.7* X5169 F
0 to 70 8 Ld SOIC MDP0027
X5168S8Z-2.7* X5168 Z F
(Note)
X5169S8Z-2.7* X5169 Z F
(Note)
8 Ld SOIC
(Pb-free)
MDP0027
X5168S8I-2.7* X5168 G
X5169S8I-2.7* X5169 G
-40 to 85 8 Ld SOIC MDP0027
X5168S8IZ-2.7* X5168 Z G X5169S8IZ-2.7* X5169 Z G
(Note)
(Note)
8 Ld SOIC
(Pb-free)
MDP0027
X5168V14-2.7* X5168V F X5169V14-2.7* X5169V F
0 to 70 14 Ld TSSOP M14.173
X5168V14Z-2.7* X5168V Z F X5169V14Z-2.7* X5169V Z F
(Note)
(Note)
0 to 70
14 Ld TSSOP M14.173
(Pb-free)
X5168V14I-2.7* X5168V G X5169V14I-2.7* X5168V G
-40 to 85 14 Ld TSSOP M14.173
X5168V14IZ-2.7* X5168V Z G X5169V14IZ-2.7* X5168V Z G
(Note)
(Note)
-40 to 85 14 Ld TSSOP M14.173
(Pb-free)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
*Add "-T1" suffix for tape and reel.
**Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.
Pin Configuration
8 LD SOIC/PDIP
CS 1 X5168/X5169 8
VCC
SO 2
7 RESET/RESET
WP 3
6 SCK
VSS
4
5 SI
CS
SO
NC
NC
NC
WP
VSS
14 LD TSSOP
1
X5168/X5169
14
2 13
3 12
4 11
5 10
69
78
VCC
RESET/RESET
NC
NC
NC
SCK
SI
3 FN8130.2
June 15, 2006



Recommended third-party X5169 Datasheet






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