NM95MS18. 95MS18 Datasheet

95MS18 NM95MS18. Datasheet pdf. Equivalent


Fairchild Semiconductor 95MS18
July 1998
NM95MS18
Plug & Play Front-end device for ISA-Bus Systems
(Supports Windows®-NT, UNIX® and legacy systems)
General Description
The NM95MS18 is an industry standard ISA Plug-n-Play control-
ler that also supports Non-Plug-n-Play platforms like DOS,
WIN3.1x, Windows-NT and Unix.
In additon to being completely compliant to ISA PnP Specification
(Ver 1.0a), NM95MS18 integrates a total of 4Kbit of onchip
EEPROM for both PnP Resource data as well as non-PnP
configuration data to provide a true single chip solution.
NM95MS18 supports one logical device offering a flexible choice
of DMA, Interrupt and I/O address decoding features within a
single chip. NM95MS18 is implemented using Fairchild’s Ad-
vanced CMOS process and operates on a single power supply.
Features
s Fully compliant with industry standard ISA PnP specification
(Ver. 1.0a)
s Supports Non-PnP platforms like WINDOWS-NT, UNIX,
DOS/WIN3.1x
— No configuration utilities needed
s Supports Non-PnP "legacy" mode
— Can be programmed to power-up in 31 settings
s On-chip "Write-Protected" EEPROM for:
— PnP Resource data (2Kbits)
— 31 Power-on "legacy" configurations (2Kbits)
s Two modes of operation:
— DMA Mode
— Extended Interrupt Mode (supports PC-97 requirements)
s Configurable Interrupt types:
— TTL O/P
— Open Drain O/P
s Supports Wire-AND I/O chipselects
s Fully compatible with NM95MS16
s Available in 52-Pin PLCC Package
Block Diagram
ISA BUS
RSTDRV
From Switches
NPNP
SW[0:4]
Input Sense
Logic
Test Mode
Logic
SA[0:11]
IORD
IOWR
AEN
OSC
PnP Cycle
Detection
Logic
IRQOUT[0:7]
SD[0:7]
ISADRQ[0:1]
ISADACK[0:1]
SA[0:15]
IORD
IOWR
AEN
Data
Buffer
State
Machine
Registers
EEPROM
Controller
I/F
IRQ IRQIN[0:1]
Switch Logic
DMA
Switch
Logic
DRQIN
DACKOUT
ADDRESS
DECODER
IOCS[0:2]
DS500033-1
© 1998 Fairchild Semiconductor Corporation
1
www.fairchildsemi.com


95MS18 Datasheet
Recommendation 95MS18 Datasheet
Part 95MS18
Description NM95MS18
Feature 95MS18; NM95MS18 Plug 'n' Play Front End Device for ISA-Bus Systems July 1998 NM95MS18 Plug & Play Front-e.
Manufacture Fairchild Semiconductor
Datasheet
Download 95MS18 Datasheet




Fairchild Semiconductor 95MS18
Block Signal Description
Signal
SA[0:11]
SA[12:15]†
IORD*
IOWR*
AEN
OSC
RSTDRV
SD[0:7]
IRQIN0
IRQIN1†
IRQOUT[0:5]
IRQOUT[6:7] †
DRQIN†
ISADRQ[0:1] †
ISADACK[0:1]* †
DACKOUT* †
IOCS[0:1]*
IOCS[2]* †
N_P 'N' P*
SW[0:4]
Type
I
I
I
I
I
I
I
I/O
I
I
O
O
I
O
I
I
O
O
I
I
Description
Address inputs from the ISA bus.
Address inputs from the ISA bus.
I/O Read strobe from the ISA bus.
I/O Write strobe from the ISA bus.
Address Enable Strobe from ISA bus.
14.31818 MHz clock source from ISA bus.
Reset signal from ISA bus.
ISA Data bus.
Source Interrupt signal from onboard controller.
Source Interrupt signal from onboard controller.
Interrupt output signals from NM95MS18. Can be connected to any of ISA IRQ channels.
Interrupt output signals from NM95MS18. Can be connected to any of ISA IRQ channels.
Source DMA request signal from onboard controller to NM95MS18.
DMA request output signals from NM95MS18. Can be connected to any of ISA DMA channels.
DMA Acknowledge output signals from respective ISA DMA channels to which
ISADRQ[0:1] are connected.
DMA acknowledge signal from NM95MS18 to onboard controller.
Programmable chipselects from NM95MS18 to onboard controller.
Programmable chipselects from NM95MS18 to onboard controller.
Input signal selecting either PNP mode or N_PNP mode of NM95MS18. This signal has
a weak internal pull-up resistor defaulting to PnP mode and can be directly connected to
ground . This signal is used in conjunction with SW[0:4] inputs. “1” - PNP mode. “0” -
N_PNP mode.
Input signals to NM95MS18 selecting 1-out-of-31 Non-Plug-n-Play configurations. All
these signals have a weak internal pull-up resistor and can be directly connected to
ground. These signals are used in conjunction with N_PNP signal.
* Signal name with a “*” indicates active low signal.
† Multiplexed signals. Please refer Pinout Details.
IRQOUT4
IRQOUT3
IRQOUT2
IRQOUT1
IRQOUT0
ISADRQ0
N_PNP*
ISADRQ1
ISADACK0*
ISADACK1*
SW0
SW1
SA0
7 6 5 4 3 2 1 52 51 50 49 48 47
8 46
9 45
10 44
11 43
12 42
13 41
14 40
15 39
16 38
17 37
18 36
19 35
20 34
21 22 23 24 25 26 27 28 29 30 31 32 33
SD7
SD6
SD5
SD4
SD3
SD2
SW4
SD1
SD0
OSC
AEN
SW3
SW2
PLCC Pins
DS500033-2
2 www.fairchildsemi.com



Fairchild Semiconductor 95MS18
Pinout Details for NM95MS18 (PLCC Package)
Pin #
Pin Name
Pin #
Mode
1
2** (Note 3)
3**
4
5**
6
7
8
9
10
11
12
13**
14
15**
16**
17**
18
19
20
21
22
23
24
25
26
DMA
NC
DRQIN
DACKOUT*
GND
IRQIN1
IRQIN0
IRQOUT5
IRQOUT4
IRQOUT3
IRQOUT2
IRQOUT1
IRQOUT0
ISADRQ0
N_PnP
ISADRQ1
ISADACK0*
ISADACK1*
SW0
SW1
SA0
SA1
SA2
SA3
SA4
GND
SA5
Ext. Intr
NC
SA15
IOCS2*
GND
SA14
IRQIN0
IRQOUT5
IRQOUT4
IRQOUT3
IRQOUT2
IRQOUT1
IRQOUT0
IRQOUT6
N_PnP
IRQOUT7
SA12
SA13
SW0
SW1
SA0
SA1
SA2
SA3
SA4
GND
SA5
Mode
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
** Pins with multiplexed signals
Pin Name
DMA
NC
SA6
SA7
SA8
SA9
SA10
SA11
SW2
SW3
AEN
OSC
SD0
SD1
SW4
SD2
SD3
SD4
SD5
SD6
SD7
RSTDRV
IOCS1*
IOCS0*
IORD*
IOWR*
VCC
Ext. Intr
NC
SA6
SA7
SA8
SA9
SA10
SA11
SW2
SW3
AEN
OSC
SD0
SD1
SW4
SD2
SD3
SD4
SD5
SD6
SD7
RSTDRV
IOCS1*
IOCS0*
IORD*
IOWR*
VCC
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