DS28CN01
Rev 2; 11/09
ABRIDGED DATA SHEET
1Kb I2C/SMBus EEPROM with SHA-1 Engine
General Description
The DS28CN01 combines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the Federal Information Publications (FIPS) 180-1/180-2 and ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1). The memory is organized as four 32-by...
