INTERFACE TRANSMITTER. STA020D Datasheet

STA020D TRANSMITTER. Datasheet pdf. Equivalent


STMicroelectronics STA020D
www.DataSheet4U.com
® STA020D
96kHz DIGITAL AUDIO INTERFACE TRANSMITTER
MONOLITHIC DIGITAL AUDIO INTERFACE
TRANSMITTER
3.3V SUPPLY VOLTAGE
SUPPORTS:
- AES/EBU, IEC 958,
- S/PDIF, & EIAJ CP-340
- Professional and Consumer Formats
PARITY BITS AND CRC CODES GENERATED
TRANSPARENT MODE ALLOWS DIRECT
CONNECTION OF STA020D AND STA120
DESCRIPTION
The STA020D is a monolithic CMOS device
which encodes and transmits audio data accord-
ing to the AES/EBU, IEC 958, S/PDIF, & EIAJ
CP-340 interface standards. It supports 96kHz
sample rate operation
The STA020D accepts audio and digital data
which is then multiplexed, encoded and driven
onto a cable.
The audio serial port is double buffered and ca-
BLOCK DIAGRAM
SO24
ORDERING NUMBER: STA020D
pable of supporting a wide variety of formats.
The STA020D multiplexes the channel, user, and
validity data directly from serial input pins with
dedicated input pins for the most important chan-
nel status bits.
SCK
FSYNC
SDATA
6
7
8
10
C
11
U
9
V
M0 M1 M2
23 22 21
VD+
19
GND
18
MCK
5
RST
16
AUDIO
SERIAL PORT
REGISTERS
MUX
7
DIFFERENTIAL
20
TXP
17
TXN
15 24
DEDICATED CHANNEL CBL TRNPT
STATUS BUS
D97AU599A
October 2002
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STA020D Datasheet
Recommendation STA020D Datasheet
Part STA020D
Description 96kHz DIGITAL AUDIO INTERFACE TRANSMITTER
Feature STA020D; www.DataSheet4U.com ® STA020D 96kHz DIGITAL AUDIO INTERFACE TRANSMITTER MONOLITHIC DIGITAL AUDIO .
Manufacture STMicroelectronics
Datasheet
Download STA020D Datasheet




STMicroelectronics STA020D
STA020D
ABSOLUTE MAXIMUM RATINGS
Symbol
VD+
VIND
Tamb
Tstg
Parameter
DC Power Supply
Digital Input Voltage
Ambient Operating Temperature (power applied)
Storage Temperature
Value
4
-0.3 to VD+ 0.3
-20 to +85
-40 to 150
Unit
V
V
°C
°C
RECOMMNDED OPERATING CONDITIONS (GND = 0V; all voltages with respect to ground)
Symbol
VD+
Tamb
Parameter
DC Voltage
Ambient Operating Temp.
Test Condition
Min.
3
0
Typ.
3.3
25
Max.
3.6
70
Unit
V
°C
PIN CONNECTION
C7/C3
PRO
C1/FC0
C6/C2
MCK
SCK
FSYNC
SDATA
V
C/SBF
U
C9/C15
1 24
2 23
3 22
4 21
5 20
6 19
7 18
8 17
9 16
10 15
11 14
12 13
D97AU608A
TRNPT/FC1
M0
M1
M2
TXP
VD+
GND
TXN
RST
CBL/SBC
EM0/C9
EM1/C8
PINS DESCRIPTION
N. Name
Function
Power Supply Connections
18
GND
Ground.
19
VD+
Positive Digital Power. Nominally +3.3V.
Audio Input Interface
6
SCK
Serial Clock.
Serial clock for SDATA pin which can be configured (via the M0, M1 and M2 pins) as an input
or output and can sample data on the rising or falling edge.As an output, SCK will contain 32
clocks for every audio sample.
7 FSYNC Frame Sync.
Delineates the serial data and may indicate the particular channel, left or right and may be an
input or output. The format is based on M0, M1 and M2 pins.
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STMicroelectronics STA020D
STA020D
PINS DESCRIPTION (continued)
N. Name
Function
8 SDATA Serial Data.
Audio data serial input pin.
21, M0, M1, M2 Serial Port Mode Select.
22,23
Selects the format of FSYNC and the sample edge of SCK with respect to SDATA.
Control Pins
1 C7/C3 Channel Status Bit 7/Channel Status Bit 3.
In professional mode, C7 is the inverse of channel status bit 7. In consumer mode, C3 is the
inverse of channel status bit 3, C7/C3 are ignored in Transparent Mode.
2
PRO
Professional/Consumer Select.
Selects between professional mode (PRO low) and consumer mode (PRO high). This pin
defines the functionality of the channel status parallel pins. PRO is ignored in Transparent
Mode.
3 C1/FC0 Channel Status Bit 1/Frequency Control 0.
In professional mode, C1 is the inverse of channel status bit 1. In consumer mode, FC0 and
FC1 are encoded versions of channel status bits 24 and 25 (bits 0 and 1 of byte 3). When
FC0 and FC1 are both high, CD mode is selected. C1/FC0 are ignored in Transparent Mode.
4 C6/C2 Channel Status Bit 6/Channel Status Bit 2.
In professional mode, C6 is the inverse of channel status bit 6. In consumer mode, C2 is the
inverse of channel status bit 2. C6/C2 are ignored in Transparent Mode.
9 V Validity.
Validity bit serial input port. This bit is defined as per the digital audio standards wherein V = 0
signifies the audio signal is suitable for conversion to analog. V = 1 signifies the audio signal is
not suitable for conversion to analog, i.e. invalid.
10 C/SBF Channel Status Serial Input/Subcode Frame Clock.
In professional and consumer modes this pin is the channel status serial input port. In CD
mode this pin inputs the CD subcode frame clock.
11 U User Bit.
User bit serial input port.
12 C9/C15 Channel Status Bit 9/Channel Status Bit 15.
In professional mode, C9 is the inverse of channel status bit 9 (bit 1 of byte 1). In consumer
mode, C15 is the inverse of channel status bit 15 (bit 7 of byte 1). C9/C15 are ignored in
Transparent Mode.
13 EM1/C8 Emphasis 1/Channel Status Bit 8.
In professional mode, EM0 and EM1 encode channel status bits 2, 3 and 4. In consumer
mode, C8 is the inverse of channel status bit 8 (bit 0 of byte 1). EM1/C8 are ignored in
Transparent Mode.
14 EM0/C9 Emphasis 0/Channel Status Bit 9.
In professional mode, EM0 and EM1 encode channel status bits 2, 3 and 4. In consumer
mode, C9 is the inverse of channel status bit 9 (bit 1 of byte 1). EM0/C9 are ignored in
Transparent Mode.
15 CBL/SBC Channel Status Block Output/Subcode Bit Clock.
In professional and consumer modes, the channel status block output is high for the first 15
bytes of channel status. In CD mode, this pin outputs the subcode bit clock.
16
RST
Master Reset.
When low, all internal counters are reset.
24 TRNPT/FC1 Transparent Mode/Frequency Control 1.
In professional mode, setting TRNPT low selects normal operation & CBL is an output. Setting
TRNPT high, allows the STA020D to be connected directly to an STA120. In transparent
mode, CBL is an input & MCK must be at 256 Fs. In consumer mode, FC0 and FC1 are
encoded versions of channel status bits 24 and 25. When FC0 and FC1 are both high, CD
mode is selected.
Transmitter Interface
5
MCK
Master Clock. Clock input at 128x the sample frequency which defines the transmit timing. In
trasparent mode MCK must be 256 Fs.
20, 17 TXP, TXN Differential Line Drivers.
3/11







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