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IMAGE SENSOR. UPD8862 Datasheet

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IMAGE SENSOR. UPD8862 Datasheet






UPD8862 SENSOR. Datasheet pdf. Equivalent




UPD8862 SENSOR. Datasheet pdf. Equivalent





Part

UPD8862

Description

COLOR CCD LINEAR IMAGE SENSOR

Manufacture

NEC

Datasheet
Download UPD8862 Datasheet


NEC UPD8862

UPD8862; www.DataSheet4U.com DATA SHEET MOS INT EGRATED CIRCUIT µ PD8862 (2700 + 2700 ) PIXELS × 3 COLOR CCD LINEAR IMAGE SE NSOR DESCRIPTION The µ PD8862 is a co lor CCD (Charge Coupled Device) linear image sensor which changes optical imag es to electrical signal and has the fun ction of color separation. The µ PD886 2 has 3 rows of (2700 + 2700) staggered pixels, and each row .


NEC UPD8862

has a dual-sided readout-type charge tra nsfer register. And it has reset feed-t hrough level clamp circuits and voltage amplifiers. Therefore, it is suitable for 600 dpi/A4 color image scanners, co lor facsimiles and so on. FEATURES • Valid photocell • Photocell pitch Line spacing • Color filter • Res olution : (2700 + 2700) staggered pixel s × 3 : 5.25 µ m : 63 µ m (1.


NEC UPD8862

2 lines) Red line - Green line, Green li ne - Blue line 10.5 µ m (2 lines) Odd line - Even line (for each color) : Pri mary colors (red, green and blue), pigm ent filter (with light resistance 10 lx •hour) : 24 dot/mm A4 (210 × 297 mm) size (shorter side) 600 dpi US letter (8.5” × 11”) size (shorter side) Drive clock level : CMOS output unde r 5 V operation • Data rate •.



Part

UPD8862

Description

COLOR CCD LINEAR IMAGE SENSOR

Manufacture

NEC

Datasheet
Download UPD8862 Datasheet




 UPD8862
www.DataSheet4U.com
DATA SHEET
MOS INTEGRATED CIRCUIT
µ PD8862
(2700 + 2700) PIXELS × 3 COLOR CCD LINEAR IMAGE SENSOR
DESCRIPTION
The µ PD8862 is a color CCD (Charge Coupled Device) linear image sensor which changes optical images to
electrical signal and has the function of color separation.
The µ PD8862 has 3 rows of (2700 + 2700) staggered pixels, and each row has a dual-sided readout-type charge
transfer register. And it has reset feed-through level clamp circuits and voltage amplifiers. Therefore, it is suitable for
600 dpi/A4 color image scanners, color facsimiles and so on.
FEATURES
Valid photocell : (2700 + 2700) staggered pixels × 3
Photocell pitch : 5.25 µ m
Line spacing : 63 µ m (12 lines) Red line - Green line, Green line - Blue line
Color filter
10.5 µ m (2 lines) Odd line - Even line (for each color)
: Primary colors (red, green and blue), pigment filter (with light resistance 107 lx•hour)
Resolution
: 24 dot/mm A4 (210 × 297 mm) size (shorter side)
600 dpi US letter (8.5” × 11”) size (shorter side)
Drive clock level : CMOS output under 5 V operation
Data rate
: 6 MHz Max.
Power supply : +12 V
On-chip circuits : Reset feed-through level clamp circuits
Voltage amplifiers
ORDERING INFORMATION
Part Number
Package
µ PD8862CY
CCD linear image sensor 22-pin plastic DIP (10.16 mm (400))
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. S16033EJ3V0DS00 (3rd edition)
Date Published July 2003 NS CP (K)
Printed in Japan
The mark shows major revised points.
2002





 UPD8862
BLOCK DIAGRAM
VOD GND
19 11
φ 2L
17
VOUT1
(Blue)
20
VOUT2
(Green)
21
VOUT3
(Red)
22
32
φ CLB φ RB
4
φ1L
µ PD8862
CCD analog shift register
Transfer gate
······
Photocell
(Blue)
Transfer gate
CCD analog shift register
CCD analog shift register
Transfer gate
······
Photocell
(Green)
Transfer gate
CCD analog shift register
CCD analog shift register
Transfer gate
······
Photocell
(Red)
Transfer gate
CCD analog shift register
φ2 φ1
15 14
13
φTG1
(Blue)
12
φ TG2
(Green)
10
φTG3
(Red)
89
φ2 φ1
2 Data Sheet S16033EJ3V0DS





 UPD8862
PIN CONFIGURATION (Top View)
CCD linear image sensor 22-pin plastic DIP (10.16 mm (400))
µ PD8862CY
µ PD8862
No connection NC 1
Reset gate clock φ RB 2
Reset feed-through level clamp clock φ CLB 3
Last stage shift register clock 1 φ1L 4
No connection NC 5
No connection NC 6
No connection NC 7
Shift register clock 2
φ2 8
Shift register clock 1
φ1 9
Transfer gate clock 3
(for Red)
φ TG3
10
Ground GND 11
22 VOUT3 Output signal 3 (Red)
21 VOUT2 Output signal 2 (Green)
20 VOUT1 Output signal 1 (Blue)
19 VOD Output drain voltage
18 NC No connection
17 φ 2L Last stage shift register clock 2
16 NC No connection
15 φ 2
Shift register clock 2
14 φ 1
Shift register clock 1
13
φ TG1
Transfer gate clock 1
(for Blue)
12
φ TG2
Transfer gate clock 2
(for Green)
Caution Connect the No connection pins (NC) to GND.
Data Sheet S16033EJ3V0DS
3



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