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SERIAL EEPROMS. GSC93BC56 Datasheet

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SERIAL EEPROMS. GSC93BC56 Datasheet







GSC93BC56 EEPROMS. Datasheet pdf. Equivalent




GSC93BC56 EEPROMS. Datasheet pdf. Equivalent





Part

GSC93BC56

Description

(GSC93BC46 - GSC93BC66) 2-WIRE SERIAL EEPROMS

Manufacture

GTM

Datasheet
Download GSC93BC56 Datasheet


GTM GSC93BC56

GSC93BC56; www.DataSheet4U.com ISSUED DATE :2006/06 /14 REVISED DATE : GSC93BC46/56/66 3-w ire Serial EEPROMs 1K/2K/4K The GSC93BC family provides 1K, 2K and 4K of seria l electrically erasable and programmabl e read-only memory (EEPROM). The wide V dd range allows for low-voltage operati on down to 1.8V and up to 5.5V. The dev ice, fabricated using traditional CMOS EEPROM technology,.


GTM GSC93BC56

is optimized for many industrial and co mmercial applications where low-voltage and low-power operation is essential. The device is accessed via a 3-wire ser ial interface. Description Features Internally organized as 128x8 or 64x16 (1K), 256x8 or 128x16 (2K), 512x8 or 25 6x16 (4K) Wide-voltage range operation: 1.8V~5.5V 3-wire serial interface bus Date retention: 10.


GTM GSC93BC56

0years High endurance: 1,000,000 Write Cycles 2MHz (5V) clock rate Sequential read operation Self-timed write cycle ( 10ms max) Package Dimensions REF. A B C D E F Millimeter Min. Max. 5.80 4.8 0 3.80 0° 0.40 0.19 6.20 5.00 4.00 8° 0.90 0.25 REF. M H L J K G Millimete r Min. Max. 0.10 0.25 0.35 0.49 1.35 1. 75 0.375 REF. 45° 1.27 TYP. Figure 1. Pin Configurations .



Part

GSC93BC56

Description

(GSC93BC46 - GSC93BC66) 2-WIRE SERIAL EEPROMS

Manufacture

GTM

Datasheet
Download GSC93BC56 Datasheet




 GSC93BC56
www.DataSheet4U.com
ISSUED DATE :2006/06/14
REVISED DATE :
GSC93BC46/56/66
3-wire Serial EEPROMs 1K/2K/4K
Description
The GSC93BC family provides 1K, 2K and 4K of serial electrically erasable and programmable read-only
memory (EEPROM). The wide Vdd range allows for low-voltage operation down to 1.8V and up to 5.5V. The
device, fabricated using traditional CMOS EEPROM technology, is optimized for many industrial and
commercial applications where low-voltage and low-power operation is essential. The device is accessed via a
3-wire serial interface.
Features
Internally organized as 128x8 or 64x16 (1K),
256x8 or 128x16 (2K), 512x8 or 256x16 (4K)
Wide-voltage range operation: 1.8V~5.5V
3-wire serial interface bus
Date retention: 100years
High endurance: 1,000,000 Write Cycles
2MHz (5V) clock rate
Sequential read operation
Self-timed write cycle (10ms max)
Package Dimensions
REF.
A
B
C
D
E
F
Millimeter
Min. Max.
5.80
6.20
4.80
5.00
3.80
4.00
0° 8°
0.40
0.90
0.19
0.25
REF.
M
H
L
J
K
G
Millimeter
Min. Max.
0.10
0.25
0.35
0.49
1.35
1.75
0.375 REF.
45°
1.27 TYP.
Figure 1. Pin Configurations
Pin Name
CS
SK
DI
DO
Gnd
Vcc
ORG
NC
Function
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Power Supply
Internal Organization
No Connect
Absolute Maximum Ratings
Parameter
Ratings
Unit
Voltage on Any Pin with Respect to Ground
-1.0 to Vcc +7.0
V
Maximum Operating Voltage
6.25 V
DC Output Current
5.0 mA
Operating Temperature Range
-55 ~ +125
Storage Temperature Range
-65 ~ +150
Note: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of
these specifications are not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
GSC93BC46/56/66
Page: 1/8





 GSC93BC56
Figure 2. Block Diagram
ISSUED DATE :2006/06/14
REVISED DATE :
Notes
1. The ORG pin is used to select between x8
and x16.
When the pin is connected to Vcc, x16 mode
is selected.
Otherwise, the ORG pin should be grounded
in order to select x8 mode.
The interface foe the GSC93BC46/56/66 is accessed through four different signals:
Chip Select (CS), Data Input (DI), Data Output (DO), and Serial Data Clock (SK). The Chip Select (CS) signal
must be pulled high before issuing a command through the Data Input (DI) pin. The Serial Data Clock (SK)
signal is used in conjunction with the Data Input (DI) pin.
PIN Capacitance
Applicable over recommended operating range from TA=25
Symbol
Test Condition
COUT
Output Capacitance (DO)
CIN Input Capacitance (CK, SK, DI)
Note: 1. This parameter is characterized and not 100% tested.
, f=1.0MHz, Vcc=+5V
Max Unit
5 pF
5 pF
Condition
VOUT=0V
VIN=0V
DC Characteristics
Applicable over recommended operating range from: TA=-40 ~ +85 , Vcc=+1.8 ~ +5V (unless otherwise noted)
Parameter
Symbol
Test Condition
Min TYP Max Unit
Supply Voltage
Supply Voltage
Supply Voltage
Supply Current VCC=5.0V
Supply Current VCC=5.0V
Standby Current VCC=1.8V
VCC1
VCC2
VCC3
ICC
ICC
ISB1
READ at 1MHz
WRITE at 1MHz
CS=0V
1.8 - 5.5 V
2.7 - 5.5 V
4.5 - 5.5 V
- 0.5 2.0 mA
- 0.5 2.0 mA
-
0 0.1
A
Standby Current VCC=2.7V
Standby Current VCC=5.0V
Input Leakage Current
Output Leakage Current
Input Low Level
Input High Level
Input Low Level
Input High Level
Output Low Level
Output High Level
Output Low Level
Output High Level
ISB2 CS=0V
- 6.0 10.0
ISB3 CS=0V
- 17 30
ILI VIN=0V to VCC
- 0.1 3.0
ILO VIN=0V to VCC
- 0.1 3.0
VIL1(1)
VIH1(1)
2.7V< VCC <5.5V
-0.6
2.0
-
0.8
VCC+1
VIL2(1)
VIH2(1)
1.8V< VCC <2.7V
-0.6
VCCx0.7
-
VCCx0.3
VCC+1
VOL1(1) 2.7V< VCC <5.5V; IOL=2.1mA
VOH1(1)
IOH=-0.4mA
-
2.4
-
0.4
-
VOL2(1) 1.8V< VCC <2.7V; IOL=0.15mA -
VOH2(1)
IOH=-100uA VCC-2
-
0.2
-
A
A
A
A
V
V
V
V
Note 1: VIL and VIH max are reference only and are not tested.
GSC93BC46/56/66
Page: 2/8





 GSC93BC56
ISSUED DATE :2006/06/14
REVISED DATE :
AC Characteristics
Applicable over recommended operating range from: TA=-40 ~ +85 , Vcc=As specified, CL=1 TTL Gate &
100pF (unless otherwise noted)
Parameter
Symbol
Test Condition
Min TYP Max Unit
Clock Frequency, SK
4.5V< VCC <5.5V
fSK 2.7V< VCC <5.5V
1.8V< VCC <5.5V
02
0 - 1 MHz
0 0.25
SK High Time
tSKH
4.5V< VCC <5.5V
2.7V< VCC <5.5V
1.8V< VCC <5.5V
250
250
1000
-
- ns
SK Low Time
4.5V< VCC <5.5V
tSKL 2.7V< VCC <5.5V
1.8V< VCC <5.5V
250
250
1000
-
- ns
Minimum CS Low Time
4.5V< VCC <5.5V
tCS 2.7V< VCC <5.5V
1.8V< VCC <5.5V
250
250
1000
-
- ns
CS Setup Time
tCSS
Relative
To SK
4.5V< VCC <5.5V
2.7V< VCC <5.5V
1.8V< VCC <5.5V
50
50
200
-
- ns
DI Setup Time
tDIS
Relative
To SK
4.5V< VCC <5.5V
2.7V< VCC <5.5V
1.8V< VCC <5.5V
100
100
400
-
- ns
CS Hold Time
tCSH
Relative
To SK
0 - - ns
DI Hold Time
tDIH
Relative
To SK
4.5V< VCC <5.5V
2.7V< VCC <5.5V
1.8V< VCC <5.5V
100
100
400
-
- ns
Output Delay to “1”
4.5V< VCC <5.5V
tPD1 AC Test 2.7V< VCC <5.5V
1.8V< VCC <5.5V
-
250
- 250 ns
1000
Output Delay to “0”
4.5V< VCC <5.5V
tPD0 AC Test 2.7V< VCC <5.5V
1.8V< VCC <5.5V
-
250
- 250 ns
1000
CS to Status Valid
4.5V< VCC <5.5V
tSV AC Test 2.7V< VCC <5.5V
1.8V< VCC <5.5V
-
250
- 250 ns
1000
CS to DO in High Impedance
tDF
AC Test
CS=VIL
4.5V< VCC <5.5V
2.7V< VCC <5.5V
1.8V< VCC <5.5V
-
100
- 100 ns
400
Write Cycle Time
tW P
1.8V< VCC <5.5V
-
3 10 ms
5.0V, 25
Endurance
(1)
1M -
-
Write
Cycles
Note: 1. This parameter is characterized and not 100% tested.
GSC93BC46/56/66
Page: 3/8



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