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ACCESS ARRANGEMENT. SI0318 Datasheet |
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Si3056
Si3018/19/10
GLOBAL SERIAL INTERFACE DIRECT ACCESS ARRANGEMENT
Features
Complete DAA includes the following:
Programmable line interface
AC termination
DC termination
Ring detect threshold
Ringer impedance
80 dB dynamic range TX/RX paths
Integrated codec and 2- to 4-wire
hybrid
Integrated ring detector
Type I and II caller ID support
Line voltage monitor
Loop current monitor
Polarity reversal detection
Programmable digital gain
Clock generation
Pulse dialing support
Overload detection
3.3 V power supply
Direct interface to DSPs
Serial interface control for up to eight
devices
>5000 V isolation
Proprietary isolation technology
Parallel handset detection
+3.2 dBm TX/RX level mode
Programmable digital hybrid for near-
end echo reduction
Low-profile SOIC packages
Lead-free/RoHS-compliant packages
available
Applications
V.92 modems
Voice mail systems
Multi-function printers
Set-top boxes
Fax machines
Internet appliances
Personal digital
assistants
Description
The Si3056 is an integrated direct access arrangement (DAA) with a
programmable line interface to meet global telephone line requirements. Available
in two 16-pin small outline packages, it eliminates the need for an analog front end
(AFE), isolation transformer, relays, opto-isolators, and a 2- to 4-wire hybrid. The
Si3056 dramatically reduces the number of discrete components and cost
required to achieve compliance with global regulatory requirements. The Si3056
interfaces directly to standard modem DSPs.
Functional Block Diagram
MCLK
SCLK
FSYNC
SDI
SDO
FC/RGDT
RGDT/FSD/M1
OFHK
M0
RESET
AOUT/INT
Si3056
Digital
Interface
Control
Interface
Isolation
Interface
Si3018/19/10
Isolation
Interface
Hybrid and
dc
Termination
Ring Detect
Off-Hook
RX
IB
SC
DCT
VREG
VREG2
DCT2
DCT3
RNG1
RNG2
QB
QE
QE2
Ordering Information
See page 88.
Pin Assignments
Si3056
MCLK
FSYNC
SCLK
VD
SDO
SDI
FC/RGDT
RESET
1
2
3
4
5
6
7
8
16 OFHK
15 RGDT/FSD/M1
14 M0
13 VA
12 GND
11 AOUT/INT
10 C1A
9 C2A
Si3018/19/10
QE
DCT
RX
IB
C1B
C2B
VREG
RNG1
1
2
3
4
5
6
7
8
16 DCT2
15 IGND
14 DCT3
13 QB
12 QE2
11 SC
10 VREG2
9 RNG2
US Patent # 5,870,046
US Patent # 6,061,009
Other Patents Pending
Rev. 1.05 6/05
Copyright © 2005 by Silicon Laboratories
Si3056
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Si3056
www.DSatiaS3he0et14U8.co/m1 9 / 1 0
2 Rev. 1.05
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