DS80EP100 Datasheet PDF


Part Number

DS80EP100

Description

Power-Saver Equalizer

Manufacture

National Semiconductor

Total Page 14 Pages
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Download DS80EP100 Datasheet PDF


Features Datasheet pdf www.DataSheet4U.com July 2007 DS80EP100 5 to 12.5 Gbps, Power-Saver Equalizer for Backplanes and Cables DS80EP100 5 to 12.5 Gbps, Power-Saver Equalizer for Backplanes and Cables General Descript ion National’s Power-saver equalizer compensates for transmission medium los ses and minimizes medium-induced determ inistic jitter. Performance is guarante ed over the full range of 5 to 12.5 Gbp s. The DS80EP100 requires no power to o perate. The equalizer operates anywhere in the data path to minimize media-ind uced deterministic jitter in both FR4 t races and cable applications. Symmetric I/O structures support full duplex or half duplex applications. Linear compen sation is provided independent of line.
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DS80EP100 Datasheet
www.DataSheet4U.com
July 2007
DS80EP100
5 to 12.5 Gbps, Power-Saver Equalizer for Backplanes and
Cables
General Description
National’s Power-saver equalizer compensates for transmis-
sion medium losses and minimizes medium-induced deter-
ministic jitter. Performance is guaranteed over the full range
of 5 to 12.5 Gbps. The DS80EP100 requires no power to op-
erate. The equalizer operates anywhere in the data path to
minimize media-induced deterministic jitter in both FR4 traces
and cable applications. Symmetric I/O structures support full
duplex or half duplex applications. Linear compensation is
provided independent of line coding or protocol. The device
is ideal for both bi-level and multi-level signaling.
The equalizer is available in a 6 pin leadless LLP package
with a space saving 2.2 mm X 2.5 mm footprint. This tiny
package provides maximum flexibility in placement and rout-
ing of the Power-saver equalizer.
Features
5 to 12.5 Gbps Operation
No Power or Ground Required
Equalization effective anywhere in data path
Equalizes CML, LV-PECL, LVDS signals
Symmetric I/O structures provide equal boost for bi-
directional operation
7 dB Maximum Boost
Code independent, 8b/10b or Scrambled
Supports both bi-level and multi-level signaling
Extends reach over backplanes and cables
Compatible with PCI-Express Gen1 and Gen2
Compatible with XAUI
Will operate in series with existing active Equalizer
Easy to handle 6 pin LLP
Simplified Application Diagram
30029401
Note: The DS80EP100 provides the flexibility of passing the data from either side of the device. It can be placed anywhere in the data path.
© 2007 National Semiconductor Corporation 300294
www.national.com




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