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Flash Memory. A25L80P Datasheet

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Flash Memory. A25L80P Datasheet
















A25L80P Memory. Datasheet pdf. Equivalent













Part

A25L80P

Description

Serial Flash Memory



Feature


www.DataSheet4U.com A25L80P 8 Mbit, Low Voltage, Serial Flash Memory With 50 M Hz SPI Bus Interface Preliminary Docum ent Title 8 Mbit, Low Voltage, Serial Flash Memory With 50MHz SPI Bus Interfa ce Revision History Rev. No. 0.0 Histo ry Initial issue Issue Date May 30, 20 05 Remark PRELIMINARY (May, 2005, Ve rsion 0.0) AMIC Technology Corp. A25L 80P 8 Mbit, Low Vo.
Manufacture

AMIC Technology

Datasheet
Download A25L80P Datasheet


AMIC Technology A25L80P

A25L80P; ltage, Serial Flash Memory With 50 MHz S PI Bus Interface GENERAL DESCRIPTION Th e A25L80P is an 8 Mbit (1M x 8) Serial Flash Memory, with advanced write prote ction mechanisms, accessed by a high sp eed SPI-compatible bus. The memory can be programmed 1 to 256 bytes at a time, using the Page Program instruction. Th e memory is organized as 16 sectors, ea ch containing 256 .


AMIC Technology A25L80P

pages. Each page is 256 bytes wide. Thus , the whole memory can be viewed as con sisting of 4096 pages, or 1,048,576 byt es. The whole memory can be erased usin g the Bulk Erase instruction, or a sect or at a time, using the Sector Erase in struction. Preliminary FEATURES 8 Mbit of Flash Memory Flexible Sector Archit ecture (4/4/8/16/32)KB/64x15 KB Bulk Er ase (8 Mbit) in 10.


AMIC Technology A25L80P

s (typical) Sector Erase (512 Kbit) in 1 s (typical) Page Program (up to 256 Byt es) in 3ms (typical) 2.7 to 3.6V Single Supply Voltage SPI Bus Compatible Seri al Interface 50MHz Clock Rate (maximum) Deep Power-down Mode 1µA (typical) El ectronic Signature - JEDEC Standard (13 h) Pin Configurations SO8 Connections SO16 Connections A25L80P A25L80P S Q W VSS 1 2 3 4 8 VCC 7.




Part

A25L80P

Description

Serial Flash Memory



Feature


www.DataSheet4U.com A25L80P 8 Mbit, Low Voltage, Serial Flash Memory With 50 M Hz SPI Bus Interface Preliminary Docum ent Title 8 Mbit, Low Voltage, Serial Flash Memory With 50MHz SPI Bus Interfa ce Revision History Rev. No. 0.0 Histo ry Initial issue Issue Date May 30, 20 05 Remark PRELIMINARY (May, 2005, Ve rsion 0.0) AMIC Technology Corp. A25L 80P 8 Mbit, Low Vo.
Manufacture

AMIC Technology

Datasheet
Download A25L80P Datasheet




 A25L80P
www.DataSheet4U.com
A25L80P
Preliminary
8 Mbit, Low Voltage, Serial Flash Memory
With 50 MHz SPI Bus Interface
Document Title
8 Mbit, Low Voltage, Serial Flash Memory With 50MHz SPI Bus Interface
Revision History
Rev. No. History
0.0 Initial issue
Issue Date
May 30, 2005
Remark
PRELIMINARY (May, 2005, Version 0.0)
AMIC Technology Corp.




 A25L80P
A25L80P
Preliminary
8 Mbit, Low Voltage, Serial Flash Memory
With 50 MHz SPI Bus Interface
FEATURES
8 Mbit of Flash Memory
Flexible Sector Architecture (4/4/8/16/32)KB/64x15 KB
Bulk Erase (8 Mbit) in 10s (typical)
Sector Erase (512 Kbit) in 1s (typical)
Page Program (up to 256 Bytes) in 3ms (typical)
2.7 to 3.6V Single Supply Voltage
SPI Bus Compatible Serial Interface
50MHz Clock Rate (maximum)
Deep Power-down Mode 1µA (typical)
Electronic Signature
- JEDEC Standard (13h)
Pin Configurations
SO8 Connections
GENERAL DESCRIPTION
The A25L80P is an 8 Mbit (1M x 8) Serial Flash Memory, with
advanced write protection mechanisms, accessed by a high
speed SPI-compatible bus.
The memory can be programmed 1 to 256 bytes at a time,
using the Page Program instruction.
The memory is organized as 16 sectors, each containing 256
pages. Each page is 256 bytes wide. Thus, the whole memory
can be viewed as consisting of 4096 pages, or 1,048,576
bytes.
The whole memory can be erased using the Bulk Erase
instruction, or a sector at a time, using the Sector Erase
instruction.
SO16 Connections
A25L80P
S1
Q2
W3
VSS 4
8 VCC
7 HOLD
6C
5D
A25L80P
HOLD 1 16 C
VCC 2 15 D
DU 3 14 DU
DU 4 13 DU
DU 5 12 DU
DU 6 11 DU
S 7 10 VSS
Q8 9 W
Note:
DU = Do not Use
PRELIMINARY (May 2005, Version 0.0)
1
AMIC Technology Corp.




 A25L80P
Block Diagram
HOLD
W
S
C
D
Q
Control Logic
Address register
and Counter
A25L80P
High Voltage
Generator
I/C Shift Register
256 Byte
Data Buffer
FFFFFh
Status
Register
Size of the
read-only
memory area
00000h
000FFh
256 Byte (Page Size)
X Decoder
Pin Descriptions
Pin No.
C
D
Q
S
W
HOLD
Vcc
Vss
Description
Serial Clock
Serial Data Input
Serial Data Output
Chip Select
Write Protect
Hold
Supply Voltage
Ground
PRELIMINARY (May 2005, Version 0.0)
Logic Symbol
VCC
D
C
S
W
HOLD
Q
A25L80P
VSS
2 AMIC Technology Corp.




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