Memory iButtonTM. DS1996 Datasheet

DS1996 Datasheet PDF, Equivalent


Part Number

DS1996

Description

64kbit Memory iButtonTM

Manufacture

Dallas Semiconductor

Total Page 18 Pages
PDF Download
Download DS1996 Datasheet PDF


DS1996 Datasheet
www.dalsemi.com
SPECIAL FEATURES
§ 65536 bits of read/write nonvolatile memory
§ Overdrive mode boosts communication
speed to 142k bits per second
§ 256-bit scratchpad ensures integrity of data
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transfer
§ Memory partitioned into 256-bit pages for
packetizing data
§ Data integrity assured with strict read/write
protocols
§ Operating temperature range from -40°C to
+70°C
§ Over 10 years of data retention
COMMON iButton FEATURES
§ Unique, factory-lasered and tested 64-bit
registration number (8-bit family code + 48-
bit serial number 8-bit CRC tester) assures
absolute traceability because no two parts are
alike
§ Multidrop controller for MicroLAN
§ Digital identification and information by
momentary contact
§ Chip-based data carrier compactly stores
information
§ Data can be accessed while affixed to object
§ Economically communicates to bus master
with a single digital signal at 16.3k bits per
second
§ Standard 16 mm diameter and 1-WireTM
protocol ensure compatibility with iButton
family
§ Button shape is self-aligning with cup-
shaped probes
§ Durable stainless steel case engraved with
registration number withstands harsh
environments
DS1996
64kbit Memory iButtonTM
F5 MICROCANTM
5.89
0.36
0.51
c 1993 16.25
YYWW REGISTERED RR
5E 0C
000000FBC52B
17.35
DATA
GROUND
All dimensions are shown in millimeters
§ Easily affixed with self-stick adhesive
backing, latched by its flange, or locked with
a ring pressed onto its rim
§ Presence detector acknowledges when reader
first applies voltage
§ Meets UL#913 (4th Edit); Intrinsically Safe
Apparatus, Approved under Entity Concept
for use in Class I, Division 1, Group A, B, C
and D Locations (application pending)
ORDERING INFORMATION
DS1996L-F5 F5 MicroCan
EXAMPLES OF ACCESSORIES
DS9096P
Self-Stick Adhesive Pad
DS9101
Multi-Purpose Clip
DS9093RA
Mounting Lock Ring
DS9093F
Snap-In Fob
DS9092
iButton Probe
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91099

DS1996 Datasheet
DS1996
iButton DESCRIPTION
The DS1996 Memory iButton is a rugged read/write data carrier that acts as a localized database that can
be easily accessed with minimal hardware. The nonvolatile memory offers a simple solution to storing
and retrieving vital information pertaining to the object to which the iButton is attached. Data is
transferred serially via the 1-Wire protocol which requires only a single data lead and a ground return.
The scratchpad is an additional page that acts as a buffer when writing to memory. Data is first written to
the scratchpad where it can be read back. After the data has been verified, a copy scratchpad command
will transfer the data to memory. This process ensures data integrity when modifying the memory. A 48-
bit serial number is factory lasered into each DS1996 to provide a guaranteed unique identity which
allows for absolute traceability. The durable MicroCan package is highly resistant to environmental
hazards such as dirt, moisture, and shock. Its compact button-shaped profile is self-aligning with mating
receptacles, allowing the DS1996 to be easily used by human operators. Accessories permit the DS1996
to be mounted on almost any surface including plastic key fobs, photo-ID badges and printed circuit
www.DataSheet4U.com
boards. Applications include access control, work-in-progress tracking, electronic travelers, storage of
calibration constants, and debit tokens.
OVERVIEW
The block diagram in Figure 1 shows the relationships between the major control and memory sections of
the DS1996. The DS1996 has three main data components: 1) 64-bit lasered ROM, 2) 256-bit scratchpad
and 3) 65536-bit SRAM. The hierarchial structure of the 1-Wire protocol is shown in Figure 2. The bus
master must first provide one of the six ROM Function Commands, 1)Read ROM, 2) Match ROM, 3)
Search ROM, 4) Skip ROM, 5) Overdrive-Skip ROM or Overdrive-Match ROM. Upon completion of an
overdrive ROM command byte executed at standard speed, the device will enter Overdrive mode where
all subsequent communication occurs at a higher speed. The protocol required for these ROM Function
Commands is described in Figure 9. After a ROM Function Command is successfully executed, the
memory functions become accessible and the master may provide any one of the four memory function
commands. The protocol for these memory function commands is described in Figure 7. All data read and
written least significant bit first.
PARASITE POWER
The block diagram (Figure 1) shows the parasite-powered circuitry. This circuitry ”steals” power
whenever the data line is high. The data line will provide sufficient power as long as the specified timing
and voltage requirements are met. The advantages of parasite power are two-fold: 1) by parasiting off this
input, lithium is conserved and 2) if the lithium is exhausted for any reason, the ROM may still be read
normally.
64-BIT LASERED ROM
Each DS1996 contains a unique ROM code that is 64 bits long. The first eight bits are a 1-Wire family
code. The next 48 bits are a unique serial number. The last eight bits are a CRC of the first 56 bits.
(Figure 3.)
The 1-Wire CRC is generated using a polynomial generator consisting of a shift register and XOR gates
as shown in Figure 4. The polynomial is X8 + X5 + X4 + 1. Additional information about the Dallas 1-
Wire Cyclic Redundancy Check is available in the Book of DS19xx iButton Standards.
The shift register bits are initialized to zero. Then starting with the least significant bit of the family code,
one bit at a time is shifted in. After the 8th bit of the family code has been entered, then the serial number
is entered. After the 48th bit of the serial number has been entered, the shift register contains the CRC
value. Shifting in the eight bits of CRC should return the shift register to all zeros.
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Features Datasheet pdf DS1996 64kbit Memory iButtonTM www.dalse mi.com SPECIAL FEATURES 65536 bits of read/write nonvolatile memory Overdrive mode boosts communication speed to 142 k bits per second § 256-bit scratchpad ensures integrity of data www.DataShee t4U.com transfer § Memory partitioned into 256-bit pages for packetizing data § Data integrity assured with strict read/write protocols § Operating tempe rature range from -40°C to +70°C § O ver 10 years of data retention § § F 5 MICROCANTM 5.89 0.36 0.51 c 1993 16. 25 YYWW REGISTERED RR 5E 0C 17.35 000000FBC52B DATA GROUND COMMON iButt on FEATURES § Unique, factory-lasered and tested 64-bit registration number ( 8-bit family code + 48bit serial number 8-bit CRC tester) assures absolute tra ceability because no two parts are alik e Multidrop controller for MicroLAN Dig ital identification and information by momentary contact Chip-based data carri er compactly stores information Data ca n be accessed while affixed to object Economically communicates to bus ma.
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