HY27US08121M. Y27US08121M Datasheet

Y27US08121M Datasheet PDF, Equivalent


Part Number

Y27US08121M

Description

HY27US08121M

Manufacture

Hynix Semiconductor

Total Page 30 Pages
PDF Download
Download Y27US08121M Datasheet PDF


Y27US08121M Datasheet
HY27SS(08/16)121M Series
HY27US(08/16)121M Series
512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
Document Title
512Mbit (64Mx8bit / 32Mx16bit) NAND Flash Memory
Revision History
w w w . D a t a S h eNeot .4 U . c o m
0.0 Initial Draft
History
0.1 Renewal Product Group
0.2 Make a decision of PKG information
0.3 Append 1.8V Operation Product to Data sheet
1) Add Errata
Draft Date
Sep.17.2003
Oct.07.2003
Nov.08.2003
Dec.01.2003
Remark
Preliminary
Preliminary
Preliminary
Preliminary
tWC tWH tWP tRC tREH tRP tREA@ID Read
Specification 50 15 25 50 15 30
35
Relaxed value 60 20 40 60 20 40
45
0.4 Mar.28.2004
Preliminary
2) Modify the description of Device Operations
- /CE Don’t Care Enabled(Disabled) -> Sequential Row Read Disabled
(Enabled) (Page22)
3) Add the description of System Interface Using CE don’t care
(Page37)
1) Delete Errata
2) Change Characteristics (3V Product)
0.5 Before
After
tCRY
60 + tr
70 + tr
tREA@ID Read
35
45
Jun. 01. 2004 Preliminary
3) Delete Cache Program
1) Change TSOP1, WSOP1, FBGA package dimension
0.6 2) Edit TSOP1, WSOP1 package figures
3) Change FBGA package figure
Oct. 20. 2004
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
use of circuits described. No patent licenses are implied.
Rev 0.6 / Oct. 2004
1

Y27US08121M Datasheet
HY27SS(08/16)121M Series
HY27US(08/16)121M Series
512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
FEATURES SUMMARY
HIGH DENSITY NAND FLASH MEMORIES
- Cost effective solutions for mass storage applications
NAND INTERFACE
- x8 or x16 bus width.
- Multiplexed Address/ Data
www.DataSheet4U-.cPoimnout compatibility for all densities
SUPPLY VOLTAGE
- 3.3V device: VCC = 2.7 to 3.6V : HY27USXX121M
- 1.8V device: VCC = 1.7 to 1.95V : HY27SSXX121M
Memory Cell Array
- 528Mbit = 528 Bytes x 32 Pages x 4,096 Blocks
PAGE SIZE
- x8 device : (512 + 16 spare) Bytes
: HY27(U/S)S08121M
- x16 device: (256 + 8 spare) Words
: HY27(U/S)S16121M
BLOCK SIZE
- x8 device: (16K + 512 spare) Bytes
- x16 device: (8K + 256 spare) Words
PAGE READ / PROGRAM
- Random access: 12us (max)
- Sequential access: 50ns (min)
- Page program time: 200us (typ)
COPY BACK PROGRAM MODE
- Fast page copy without external buffering
FAST BLOCK ERASE
- Block erase time: 2ms (Typ)
STATUS REGISTER
ELECTRONIC SIGNATURE
Sequential Row Read OPTION
AUTOMATIC PAGE 0 READ AT POWER-UP
OPTION
- Boot from NAND support
- Automatic Memory Download
SERIAL NUMBER OPTION
HARDWARE DATA PROTECTION
- Program/Erase locked during Power transitions
DATA INTEGRITY
- 100,000 Program/Erase cycles
- 10 years Data Retention
PACKAGE
- HY27US(08/16)121M-T(P)
: 48-Pin TSOP1 (12 x 20 x 1.2 mm)
- HY27US(08/16)121M-T (Lead)
- HY27US(08/16)121M-TP (Lead Free)
- HY27US08121M-V(P)
: 48-Pin WSOP1 (12 x 17 x 0.7 mm)
- HY27US08121M-V (Lead)
- HY27US08121M-VP (Lead Free)
- HY27(U/S)S(08/16)121M-F(P)
: 63-Ball FBGA (8.5 x 15 x 1.2 mm)
- HY27US(08/16)121M-F (Lead)
- HY27US(08/16)121M-FP (Lead Free)
- HY27SS(08/16)121M-F (Lead)
- HY27SS(08/16)121M-FP (Lead Free)
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
use of circuits described. No patent licenses are implied.
Rev 0.6 / Oct. 2004
2


Features Datasheet pdf HY27SS(08/16)121M Series HY27US(08/16)12 1M Series 512Mbit (64Mx8bit / 32Mx16bit ) NAND Flash Document Title 512Mbit (64 Mx8bit / 32Mx16bit) NAND Flash Memory R evision History No. www.DataShe et4U.co m 0.0 0.1 0.2 0.3 Initial Draft Renewal Product Group Make a decision of PKG i nformation Append 1.8V Operation Produc t to Data sheet 1) Add Errata tWC Speci fication 0.4 Relaxed value 50 60 tWH 15 20 tWP 25 40 tRC 50 60 tREH 15 20 tRP 30 40 tREA@ID Read 35 45 Mar.28.2004 Pr eliminary History Draft Date Sep.17.2 003 Oct.07.2003 Nov.08.2003 Dec.01.2003 Remark Preliminary Preliminary Prelim inary Preliminary 2) Modify the descri ption of Device Operations - /CE Don’ t Care Enabled(Disabled) -> Sequential Row Read Disabled (Enabled) (Page22) 3) Add the description of System Interfac e Using CE don’t care (Page37) 1) Del ete Errata 2) Change Characteristics (3 V Product) 0.5 tCRY Before After 60 + t r 70 + tr tREA@ID Read 35 45 Jun. 01. 2 004 Preliminary 3) Delete Cache Program 0.6 1) Change TSOP1, WSOP1.
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