74AHC2G32 gate Datasheet

74AHC2G32 Datasheet PDF, Equivalent


Part Number

74AHC2G32

Description

Dual 2-input OR gate

Manufacture

NXP Semiconductors

Total Page 14 Pages
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74AHC2G32
74AHC2G32; 74AHCT2G32
Dual 2-input OR gate
Rev. 3 — 14 May 2013
Product data sheet
1. General description
The 74AHC2G32; 74AHCT2G32 is a high-speed Si-gate CMOS device.
The 74AHC2G32; 74AHCT2G32 provides two 2-input OR gates.
2. Features and benefits
Symmetrical output impedance
High noise immunity
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101C exceeds 1000 V
Low power dissipation
Balanced propagation delays
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
74AHC2G32DP 40 C to +125 C TSSOP8
74AHCT2G32DP
74AHC2G32DC 40 C to +125 C VSSOP8
74AHCT2G32DC
74AHC2G32GD 40 C to +125 C XSON8
74AHCT2G32GD
Description
Version
plastic thin shrink small outline package; 8 leads; body SOT505-2
width 3 mm; lead length 0.5 mm
plastic very thin shrink small outline package; 8 leads; SOT765-1
body width 2.3 mm
plastic extremely thin small outline package; no leads; SOT996-2
8 terminals; body 3 2 0.5 mm

74AHC2G32
NXP Semiconductors
74AHC2G32; 74AHCT2G32
Dual 2-input OR gate
4. Marking
Table 2. Marking
Type number
74AHC2G32DP
74AHCT2G32DP
74AHC2G32DC
74AHCT2G32DC
74AHC2G32GD
74AHCT2G32GD
Marking code[1]
A32
C32
A32
C32
A32
C32
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
1 1A
2 1B
5 2A
6 2B
1Y 7
2Y 3
mna733
Fig 1. Logic symbol
1
1 7
2
5
1 3
6
mna734
Fig 2. IEC logic symbol
6. Pinning information
6.1 Pinning
B
Y
A
mna166
Fig 3. Logic diagram (one gate)
74AHC2G32
74AHCT2G32
1A 1
1B 2
2Y 3
GND 4
8 VCC
7 1Y
6 2B
5 2A
001aaj504
Fig 4. Pin configuration SOT505-2 (TSSOP8) and
SOT765-1 (VSSOP8)
74AHC2G32
74AHCT2G32
1A 1
1B 2
8 VCC
7 1Y
2Y 3
6 2B
GND 4
5 2A
001aaj505
Transparent top view
Fig 5. Pin configuration SOT996-2 (XSON8)
74AHC_AHCT2G32
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 14 May 2013
© NXP B.V. 2013. All rights reserved.
2 of 14


Features 74AHC2G32; 74AHCT2G32 Dual 2-input OR g ate Rev. 3 — 14 May 2013 Product dat a sheet 1. General description The 74 AHC2G32; 74AHCT2G32 is a high-speed Si- gate CMOS device. The 74AHC2G32; 74AHCT 2G32 provides two 2-input OR gates. 2. Features and benefits  Symmetrical output impedance  High noise immunit y  ESD protection:  HBM JESD22-A1 14E exceeds 2000 V  MM JESD22-A115-A exceeds 200 V  CDM JESD22-C101C exc eeds 1000 V  Low power dissipation Balanced propagation delays  Mult iple package options  Specified from 40 C to +85 C and from 40 C to +125 C 3. Ordering informat ion Table 1. Ordering information Typ e number Package Temperature range Na me 74AHC2G32DP 40 C to +125 C TSSOP8 74AHCT2G32DP 74AHC2G32DC 4 0 C to +125 C VSSOP8 74AHCT2G32D C 74AHC2G32GD 40 C to +125 C XSON8 74AHCT2G32GD Description Versi on plastic thin shrink small outline p ackage; 8 leads; body SOT505-2 width 3 mm; lead length 0.5 mm .
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