Analog-to-Digital Converter. ADS5277 Datasheet

ADS5277 Converter. Datasheet pdf. Equivalent

ADS5277 Datasheet
Recommendation ADS5277 Datasheet
Part ADS5277
Description 65MSPS Analog-to-Digital Converter
Feature ADS5277; BurrĆBrown Products from Texas Instruments ADS5277 SBAS333C – FEBRUARY 2005 – REVISED SEPTEMBER 200.
Manufacture Burr-Brown Corporation
Datasheet
Download ADS5277 Datasheet




Burr-Brown Corporation ADS5277
BurrĆBrown Products
from Texas Instruments
ADS5277
SBAS333C – FEBRUARY 2005 – REVISED SEPTEMBER 2005
8-Channel, 10-Bit, 65MSPS Analog-to-Digital Converter
with Serial LVDS Interface
FEATURES
Maximum Sample Rate: 65MSPS
10-Bit Resolution
No Missing Codes
Total Power Dissipation:
Internal Reference: 911mW
External Reference: 845mW
CMOS Technology
Simultaneous Sample-and-Hold
61.7dBFS SNR at 5MHz IF
3.3V Digital/Analog Supply
Serialized LVDS Outputs
Integrated Frame and Bit Patterns
Option to Double LVDS Clock Output Currents
Four Current Modes for LVDS
Pin- and Format-Compatible Family
TQFP-80 PowerPAD™ Package
APPLICATIONS
Portable Ultrasound Systems
Tape Drives
Test Equipment
DESCRIPTION
The ADS5277 is a high-performance, CMOS,
65MSPS, 8-channel analog-to-digital converter
(ADC). Internal references are provided, simplifying
system design requirements. Low power consumption
allows for the highest of system integration densities.
Serial LVDS (low-voltage differential signaling)
outputs reduce the number of interface lines and
package size.
MODEL
ADS5270
ADS5271
ADS5272
ADS5273
RELATED PRODUCTS
RESOLUTION
(BITS)
12
12
12
12
SAMPLE RATE
(MSPS)
40
50
65
70
CHANNELS
8
8
8
8
An integrated phase lock loop (PLL) multiplies the
incoming ADC sampling clock by a factor of 12. This
high-frequency clock is used in the data serialization
and transmission process. The word output of each
internal ADC is serialized and transmitted either MSB
or LSB first. The word consists of 12 bits, of which
the 2 LSBs are zeroes and the remaining 10 bits
correspond to the output from the ADC. This
formatting is done in order to keep the interface
compatible with the 12-bit parts of the family. In
addition to the eight data outputs, a bit clock and a
word clock are also transmitted. The bit clock is at 6x
the speed of the sampling clock, whereas the word
clock is at the same speed of the sampling clock.
The ADS5277 provides internal references, or can
optionally be driven with external references. Best
performance is achieved through the internal
reference mode.
The ADS5277 is available in a PowerPAD TQFP-80
package and is specified over a –40°C to +85°C
operating range.
ADCLK
6x ADCLK
12x ADCLK
PLL
1x ADCLK
I N1 P
IN1N
S/H
I N2 P
IN2N
S/H
I N3 P
IN3N
S/H
I N4 P
IN4N
S/H
I N5 P
IN5N
S/H
I N6 P
IN6N
S/H
I N7 P
IN7N
S/H
I N8 P
IN8N
S/H
10−Bit
ADC
10−Bit
ADC
10−Bit
ADC
10−Bit
ADC
10−Bit
ADC
10−Bit
ADC
10−Bit
ADC
10−Bit
ADC
Se riali ze r
Se riali ze r
Se riali ze r
Se riali ze r
Se riali ze r
Se riali ze r
Se riali ze r
Se riali ze r
Reference
Registers
Control
I NT /E X T
LCLKP
LCLKN
ADCLKP
ADCLKN
OUT1P
OUT1N
OUT2P
OUT2N
OUT3P
OUT3N
OUT4P
OUT4N
OUT5P
OUT5N
OUT6P
OUT6N
OUT7P
OUT7N
OUT8P
OUT8N
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005, Texas Instruments Incorporated



Burr-Brown Corporation ADS5277
ADS5277
SBAS333C – FEBRUARY 2005 – REVISED SEPTEMBER 2005
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ORDERING INFORMATION(1)
PACKAGE
PRODUCT PACKAGE-LEAD(2) DESIGNATOR
ADS5277
HTQFP-80
PFP
SPECIFIED
TEMPERATURE
RANGE
–40°C to +85°C
PACKAGE
MARKING
ADS5277IPFP
ORDERING
NUMBER
ADS5277IPFP
ADS5277IPFPT
TRANSPORT
MEDIA, QUANTITY
Tray, 96
Tape and Reel, 250
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Thermal pad size: 4.69mm × 4.69mm (min), 6.20mm × 6.20mm (max).
ABSOLUTE MAXIMUM RATINGS(1)
Analog Supply Voltage Range, AVDD
Output Driver Supply Voltage Range, LVDD
Voltage Between AVSS and LVSS
Voltage Between AVDD and LVDD
Voltage Applied to External REF Pins
All LVDS Data and Clock Outputs
Analog Input Pins(2)
Operating Free-Air Temperature Range, TA
Lead Temperature, 1.6mm (1/16" from case for 10s)
Junction Temperature
Storage Temperature Range
–0.3V to +3.8V
–0.3V to +3.8V
–0.3V to +0.3V
–0.3V to +0.3V
–0.3V to +2.4V
–0.3V to +2.4V
–0.3V to min. [3.3V, (AVDD + 0.3V)]
–40°C to +85°C
+260°C
+105°C
–65°C to +150°C
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not supported.
(2) The DC voltage applied on the input pins should not go below –0.3V. Also, the DC voltage should be limited to the lower of either 3.3V
or (AVDD + 0.3V). If the input can go higher than +3.3V, then a resistor greater than or equal to 25should be added in series with
each of the input pins. Also, the duty cycle of the overshoot beyond +3.3V should be limited. The overshoot duty cycle can be defined
either as a percentage of the time of overshoot over a clock period, or over the entire device lifetime. For a peak voltage between +3.3V
and +3.5V, a duty cycle up to 10% is acceptable. For a peak voltage between +3.5V and +3.7V, the overshoot duty cycle should not
exceed 1%. Any overshoot beyond +3.7V should be restricted to less than 0.1% duty cycle, and never exceed +3.9V.
2



Burr-Brown Corporation ADS5277
ADS5277
www.ti.com
SBAS333C – FEBRUARY 2005 – REVISED SEPTEMBER 2005
RECOMMENDED OPERATING CONDITIONS
PARAMETER
MIN
SUPPLIES AND REFERENCES
Analog Supply Voltage, AVDD
3.0
Output Driver Supply Voltage, LVDD
3.0
REFT — External Reference Mode
REFB — External Reference Mode
REFCM = (REFT + REFB)/2 – External Reference Mode(1)
Reference = (REFT – REFB) – External Reference Mode
Analog Input Common-Mode Range(1)
1.825
0.9
0.75
CLOCK INPUT AND OUTPUTS
ADCLK Input Sample Rate (low-voltage TTL)
20
ADCLK Duty Cycle
45
Low-Level Voltage Clock Input
High-Level Voltage Clock Input
2.2
ADCLKP and ADCLKN Outputs (LVDS)
LCLKP and LCLKN Outputs (LVDS)(2)
Operating Free-Air Temperature, TA
Thermal Characteristics:
20
120
–40
θJA
θJC
(1) These voltages need to be set to 1.45V ± 50mV if they are derived independent of VCM.
(2) 6 × ADCLK.
ADS5277
TYP
3.3
3.3
1.95
0.95
VCM ± 50mV
1.0
VCM ± 50mV
19.4
4.2
MAX
3.6
3.6
2.0
1.075
1.1
65
55
0.6
65
390
+85
UNITS
V
V
V
V
V
V
V
MSPS
%
V
V
MHz
MHz
°C
°C/W
°C/W
3







@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)