SRAM Cube. AT61162E Datasheet

AT61162E Datasheet PDF, Equivalent


Part Number

AT61162E

Description

Rad Hard 2-Mbit x 8 SRAM Cube

Manufacture

ATMEL Corporation

Total Page 14 Pages
PDF Download
Download AT61162E Datasheet PDF


AT61162E Datasheet
Features
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Single 3.3V Power Supply
Stacks of 16 SRAM 128K x AT65609E Die
Access Time: 40 ns read, 35 ns write
Very Low Power Consumption
– Active: 130 mW (Typ)
– Standby: 1 mW (Typ)
TTL-Compatible Inputs and Outputs
Die Designed on 0.35 Micron Process
No Single Event Latch-up below a LET Threshold of 80 MeV/mg/cm2
Tested up to a Total Dose of 200 krads (Si) according to MIL STD 883 Method 1019
Wide Temperature Range -55°C to +125°C
Built by 3D+ company, using 3D+ Die Stacking Technology and Tested by Atmel
Description
The AT61162E is a Rad Hard module, highly-integrated and very low-power CMOS
static RAM organized as 2M x 8 bits. It is organized with 16 banks of 1 Mbit. Each
bank has a 8-bit interface and is selected with 16 specific CS: 0 - 15. Banks are
selectable by pairs with 8 specific BS: 0 - 7.
This module takes full benefit of the 3D+ cube technology, and it is assembled by 3D+
and tested by Atmel, using Atmel 65609E 1-Mbit SRAM die: it is built with 8 layers,
each one housing 2 dies. 10 nF decoupling capacitors are embedded for each mem-
ory die.
This module brings the solution to applications where fast computing is as mandatory
as low power consumption, for example: space electronics, portable instruments, or
embarked systems.
AT61162E is processed according to the methods of the latest revision of the MIL
PRF 38535, QML N (QML Q counterpart for plastic).
The package is a 64 gull wing pins dual in line, 11 mm wide, 28 mm long and 14.3 mm
height and 0.8 mm pin pitch.
Rad Hard
2-Mbit x 8
SRAM Cube
AT61162E
4157E–AERO–07/05

AT61162E Datasheet
Block Diagram
www.DataSheet4U.com
CS0.0 CS0.1
BS0 CS1.0 CS1.1
BS1
I/O (0:7)
A (0:16)
WE
OE
Bank 0
I/O (0:7)
A (0:16)
WE
OE
Chip 1
CS1 CS2
I/O (0:7)
A (0:16)
WE
OE
CS1 CS2
Chip 0
Bank 1
I/O (0:7)
A (0:16)
WE
OE
Chip 1
CS1 CS2
I/O (0:7)
A (0:16)
WE
OE
CS1 CS2
Chip 0
Pin
Configuration
CS7.0 CS7.1
BS7
Bank 7
I/O (0:7)
A (0:16)
WE
OE
Chip 1
CS1 CS2
I/O (0:7)
A (0:16)
WE
OE
CS1 CS2
Chip 0
BS 7
BS 6
BS 5
BS 4
BS 3
BS 2
BS 1
BS 0
CS 7.0
CS 6.0
CS 5.0
CS 4.0
CS 3.0
CS 2.0
CS 1.0
CS 0.0
CS 0.1
CS 1.1
CS 2.1
CS 3.1
CS 4.1
CS 5.1
CS 6.1
CS 7.1
2 AT61162E
4157E–AERO–07/05


Features Datasheet pdf Features • • • • • • • • • • • www.DataSheet4U.com Organi zed as 2M x 8 bits Single 3.3V Power Su pply Stacks of 16 SRAM 128K x AT65609E Die Access Time: 40 ns read, 35 ns writ e Very Low Power Consumption – Active : 130 mW (Typ) – Standby: 1 mW (Typ) TTL-Compatible Inputs and Outputs Die D esigned on 0.35 Micron Process No Singl e Event Latch-up below a LET Threshold of 80 MeV/mg/cm2 Tested up to a Total D ose of 200 krads (Si) according to MIL STD 883 Method 1019 Wide Temperature Ra nge -55°C to +125°C Built by 3D+ comp any, using 3D+ Die Stacking Technology and Tested by Atmel Description The AT 61162E is a Rad Hard module, highly-int egrated and very low-power CMOS static RAM organized as 2M x 8 bits. It is org anized with 16 banks of 1 Mbit. Each ba nk has a 8-bit interface and is selecte d with 16 specific CS: 0 - 15. Banks ar e selectable by pairs with 8 specific B S: 0 - 7. This module takes full benefi t of the 3D+ cube technology, and it is assembled by 3D+ and tested by Atmel, using Atmel 6.
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