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CY2PP326
2 x 2 Clock and Data Switch Buffer
Description
FastEdge™ Series CY2PP326 www.DataSheet4U.com 2 x 2 Clock and Data Switch Buffer Features Six ECL/PECL differential outputs Two ECL/PECL differential inputs Hot-swappable/-insertable 50 ps output-to-output skew 250 ps device-to-device skew 950 ps propagation delay (typical) 1.2 GHz Operation 2.8 ps RMS period jitter (max.) PECL mode supply...
Cypress Semiconductor
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