Flash Memory. K9F5608DOC Datasheet

K9F5608DOC Memory. Datasheet pdf. Equivalent

K9F5608DOC Datasheet
Recommendation K9F5608DOC Datasheet
Part K9F5608DOC
Description (K9F5608xOC / K9F5616xOC) 32M x 8 Bit 16M x 16 Bit NAND Flash Memory
Feature K9F5608DOC; K9F5608Q0C K9F5608D0C K9F5608U0C K9F5616Q0C K9F5616D0C K9F5616U0C FLASH MEMORY Document Title 32M.
Manufacture Samsung semiconductor
Datasheet
Download K9F5608DOC Datasheet





Samsung semiconductor K9F5608DOC
K9F5608Q0C K9F5616Q0C
K9F5608D0C K9F5616D0C
K9F5608U0C K9F5616U0C
FLASH MEMORY
Document Title
32M x 8 Bit , 16M x 16 Bit NAND Flash Memory
www.datasheet4u.com
Revision History
Revision No. History
0.0 Initial issue.
Draft Date
Apr. 25th 2002
Remark
Advance
1.0 1.Pin assignment of TBGA dummy ball is changed.
(before) DNU --> (after) N.C
Dec.14th 2002
Preliminary
2. Add the Rp vs tr ,tf & Rp vs ibusy graph for 1.8V device (Page 36)
3. Add the data protection Vcc guidence for 1.8V device - below about
1.1V. (Page 37)
4. Add the specification of Block Lock scheme.(Page 32~35)
5. Pin assignment of TBGA A3 ball is changed.
(before) N.C --> (after) Vss
6. Pin assignment of WSOP #38 pin is changed.
(before) LOCKPRE --> (after) N.C
2.0 1. The Maximum operating current is changed.
Program : Icc2 20mA-->25mA
Erase : Icc3 20mA-->25mA
Jan. 17th 2003
Preliminary
2.1 The min. Vcc value 1.8V devices is changed.
K9F56XXQ0C : Vcc 1.65V~1.95V --> 1.70V~1.95V
Mar. 5th 2003
Preliminary
2.2 Pb-free Package is added.
K9F5608U0C-FCB0,FIB0
K9F5608Q0C-HCB0,HIB0
K9F5616U0C-HCB0,HIB0
K9F5616U0C-PCB0,PIB0
K9F5616Q0C-HCB0,HIB0
K9F5608U0C-HCB0,HIB0
K9F5608U0C-PCB0,PIB0
Mar. 13rd 2003
2.3 Errata is added.(Front Page)-K9F56XXQ0C
tWC tWH tWP tRC tREH tRP tREA tCEA
Specification 45 15 25 50 15 25 30 45
Relaxed value 60 20 40 60 20 40 40 55
Mar. 26th 2003
2.4 New definition of the number of invalid blocks is added.
Apr. 4th 2003
(Minimum 1004 valid blocks are guaranteed for each contiguous 128Mb
memory space.)
Jun. 30th 2003
2.5 1. The guidence of LOCKPRE pin usage is changed.
Don’t leave it N.C. Not using LOCK MECHANISM & POWER-ON AUTO-
READ, connect it Vss.(Before)
--> Not using LOCK MECHANISM & POWER-ON AUTO-READ, connect
it Vss or leave it N.C(After)
2. 2.65V device is added.
3.Note is added.
(VIL can undershoot to -0.4V and VIH can overshoot to VCC +0.4V for
durations of 20 ns or less.)
Note : For more detailed features and specifications including FAQ, please refer to Samsung’s Flash web site.
http://www.samsung.com/Products/Semiconductor/Flash/TechnicalInfo/datasheets.htm
The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right
to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have
any questions, please contact the SAMSUNG branch office near you.
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Samsung semiconductor K9F5608DOC
K9F5608Q0C K9F5616Q0C
K9F5608D0C K9F5616D0C
K9F5608U0C K9F5616U0C
Document Title
32M x 8 Bit , 16M x 16 Bit NAND Flash Memory
www.datasheet4u.com
Revision History
Revision No. History
2.6 1. tREA value of 1.8V device is changed.
K9F56XXQ0C : tREA 30ns --> 35ns
2. Errata is deleted.
FLASH MEMORY
Draft Date
Aug. 18th 2003
Remark
Note : For more detailed features and specifications including FAQ, please refer to Samsung’s Flash web site.
http://www.samsung.com/Products/Semiconductor/Flash/TechnicalInfo/datasheets.htm
The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right
to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have
any questions, please contact the SAMSUNG branch office near you.
2



Samsung semiconductor K9F5608DOC
K9F5608Q0C K9F5616Q0C
K9F5608D0C K9F5616D0C
K9F5608U0C K9F5616U0C
FLASH MEMORY
32M x 8 Bit / 16M x 16 Bit NAND Flash Memory
PRODUCT LIST
www.datasheet4u.Pcaormt Number
Vcc Range
Organization
K9F5608Q0C-D,H
K9F5616Q0C-D,H
1.70 ~ 1.95V
X8
X16
K9F5608D0C-Y,P
K9F5608D0C-D,H
K9F5616D0C-Y,P
K9F5616D0C-D,H
2.4 ~ 2.9V
X8
X16
K9F5608U0C-Y,P
K9F5608U0C-D,H
K9F5608U0C-V,F
2.7 ~ 3.6V
X8
K9F5616U0C-Y,P
K9F5616U0C-D,H
X16
PKG Type
TBGA
TSOP1
TBGA
TSOP1
TBGA
TSOP1
TBGA
WSOP1
TSOP1
TBGA
FEATURES
Voltage Supply
- 1.8V device(K9F56XXQ0C) : 1.70~1.95V
- 2.65V device(K9F56XXD0C) : 2.4~2.9V
- 3.3V device(K9F56XXU0C) : 2.7 ~ 3.6 V
Organization
- Memory Cell Array
- X8 device(K9F5608X0C) : (32M + 1024K)bit x 8 bit
- X16 device(K9F5616X0C) : (16M + 512K)bit x 16bit
- Data Register
- X8 device(K9F5608X0C) : (512 + 16)bit x 8bit
- X16 device(K9F5616X0C) : (256 + 8)bit x16bit
Automatic Program and Erase
- Page Program
- X8 device(K9F5608X0C) : (512 + 16)Byte
- X16 device(K9F5616X0C) : (256 + 8)Word
- Block Erase :
- X8 device(K9F5608X0C) : (16K + 512)Byte
- X16 device(K9F5616X0C) : ( 8K + 256)Word
Page Read Operation
- Page Size
- X8 device(K9F5608X0C) : (512 + 16)Byte
- X16 device(K9F5616X0C) : (256 + 8)Word
- Random Access : 10µs(Max.)
- Serial Page Access : 50ns(Min.)
Fast Write Cycle Time
- Program time : 200µs(Typ.)
- Block Erase Time : 2ms(Typ.)
Command/Address/Data Multiplexed I/O Port
Hardware Data Protection
- Program/Erase Lockout During Power Transitions
Reliable CMOS Floating-Gate Technology
- Endurance : 100K Program/Erase Cycles
- Data Retention : 10 Years
Command Register Operation
Intelligent Copy-Back
Unique ID for Copyright Protection
Power-On Auto-Read Operation
Safe Lock Mechanism
Package
- K9F56XXX0C-YCB0/YIB0
48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)
- K9F56XXX0C-DCB0/DIB0
63- Ball TBGA ( 9 x 11 /0.8mm pitch , Width 1.0 mm)
- K9F5608U0C-VCB0/VIB0
48 - Pin WSOP I (12X17X0.7mm)
- K9F56XXX0C-PCB0/PIB0
48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)- Pb-free Package
- K9F56XXX0C-HCB0/HIB0
63- Ball TBGA ( 9 x 11 /0.8mm pitch , Width 1.0 mm)
- Pb-free Package
- K9F5608U0C-FCB0/FIB0
48 - Pin WSOP I (12X17X0.7mm)- Pb-free Package
* K9F5608U0C-V,F(WSOPI ) is the same device as
K9F5608U0C-Y,P(TSOP1) except package type.
GENERAL DESCRIPTION
Offered in 32Mx8bit or 16Mx16bit, the K9F56XXX0C is 256M bit with spare 8M bit capacity. The device is offered in 1.8V, 2.65V,
3.3V Vcc. Its NAND cell provides the most cost-effective solutIon for the solid state mass storage market. A program operation can
be performed in typical 200µs on a 528-byte(X8 device) or 264-word(X16 device) page and an erase operation can be performed in
typical 2ms on a 16K-byte(X8 device) or 8K-word(X16 device) block. Data in the page can be read out at 50ns cycle time per word.
The I/O pins serve as the ports for address and data input/output as well as command input. The on-chip write control automates all
program and erase functions including pulse repetition, where required, and internal verification and margining of data. Even the
write-intensive systems can take advantage of the K9F56XXX0Cs extended reliability of 100K program/erase cycles by providing
ECC(Error Correcting Code) with real time mapping-out algorithm.
The K9F56XXX0C is an optimum solution for large nonvolatile storage applications such as solid state file storage and other portable
applications requiring non-volatility.
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