I/Q Demodulator. AD9277 Datasheet

AD9277 Demodulator. Datasheet pdf. Equivalent

Part AD9277
Description Octal LNA/VGA/AAF/14-Bit ADC And CW I/Q Demodulator
Feature www.DataSheet4U.com Octal LNA/VGA/AAF/14-Bit ADC and CW I/Q Demodulator AD9277 APPLICATIONS Medical.
Manufacture Analog Devices
Datasheet
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AD9277
www.DataSheet4U.com
Octal LNA/VGA/AAF/14-Bit ADC
and CW I/Q Demodulator
AD9277
FEATURES
8 channels of LNA, VGA, AAF, ADC, and I/Q demodulator
Low noise preamplifier (LNA)
Input-referred noise: 0.75 nV/√Hz typical at 5 MHz
(gain = 21.3 dB)
SPI-programmable gain: 15.6 dB/17.9 dB/21.3 dB
Single-ended input: VIN maximum = 733 mV p-p/
550 mV p-p/367 mV p-p
Dual-mode active input impedance matching
Bandwidth (BW) > 100 MHz
Full-scale (FS) output: 4.4 V p-p differential
Variable gain amplifier (VGA)
Attenuator range: −42 dB to 0 dB
Postamp gain: 21 dB/24 dB/27 dB/30 dB
Linear-in-dB gain control
Antialiasing filter (AAF)
Programmable second-order LPF from 8 MHz to 18 MHz
Programmable HPF
Analog-to-digital converter (ADC)
14 bits at 10 MSPS to 50 MSPS
SNR: 73 dB
SFDR: 75 dB
Serial LVDS (ANSI-644, IEEE 1596.3 reduced range link)
Data and frame clock outputs
CW mode I/Q demodulator
Individual programmable phase rotation
Output dynamic range per channel >160 dBFS/√Hz
Low power: 207 mW per channel at 14 bits/50 MSPS (TGC),
94 mW per channel for CW Doppler
Flexible power-down modes
Overload recovery in <10 ns
Fast recovery from low power standby mode: <2 μs
100-lead TQFP_EP
APPLICATIONS
Medical imaging/ultrasound
Automotive radar
PRODUCT HIGHLIGHTS
1. Small Footprint.
Eight channels are contained in a small, space-saving
package. Full TGC path, ADC, and I/Q demodulator
contained within a 100-lead, 16 mm × 16 mm TQFP.
2. Low Power.
In TGC mode, low power of 207 mW per channel
at 50 MSPS. In CW mode, ultralow power of 94 mW
per channel.
3. Integrated High Dynamic Range I/Q Demodulator with
Phase Rotation.
4. Ease of Use.
A data clock output (DCO±) operates up to 480 MHz
and supports double data rate (DDR) operation.
5. User Flexibility.
Serial port interface (SPI) control offers a wide range of
flexible features to meet specific system requirements.
6. Integrated Second-Order Antialiasing Filter.
This filter is placed before the ADC and is programmable
from 8 MHz to 18 MHz.
FUNCTIONAL BLOCK DIAGRAM
AVDD1 AVDD2 PDWN STBY
DRVDD
LO-A TO LO-H
LOSW-A TO LOSW-H
LI-A TO LI-H
LG-A TO LG-H
LNA
I/Q
DEMODULATOR
VGA
AAF
8 CHANNELS
14-BIT
ADC
SERIAL
LVDS
DOUTA+ TO DOUTH+
DOUTA– TO DOUTH–
LO
GENERATION
REFERENCE
SERIAL
PORT
INTERFACE
DATA
RATE
MULTIPLIER
FCO+
FCO–
DCO+
DCO–
Figure 1.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.



AD9277
AD9277www.DataSheet4U.com
TABLE OF CONTENTS
Features .............................................................................................. 1 
Applications....................................................................................... 1 
Product Highlights ........................................................................... 1 
Functional Block Diagram .............................................................. 1 
Revision History ............................................................................... 2 
General Description ......................................................................... 3 
Specifications..................................................................................... 4 
AC Specifications.......................................................................... 4 
Digital Specifications ................................................................... 7 
Switching Specifications .............................................................. 8 
ADC Timing Diagrams ............................................................... 9 
Absolute Maximum Ratings.......................................................... 10 
Thermal Impedance ................................................................... 10 
ESD Caution................................................................................ 10 
Pin Configuration and Function Descriptions........................... 11 
Typical Performance Characteristics ........................................... 14 
TGC Mode................................................................................... 14 
CW Doppler Mode..................................................................... 17 
Equivalent Circuits ......................................................................... 19 
Theory of Operation ...................................................................... 21 
REVISION HISTORY
7/09—Revision 0: Initial Version
Ultrasound .................................................................................. 21 
Channel Overview ..................................................................... 22 
Input Overdrive .......................................................................... 25 
CW Doppler Operation............................................................. 25 
TGC Operation........................................................................... 29 
ADC ............................................................................................. 33 
Clock Input Considerations...................................................... 33 
Digital Outputs and Timing ..................................................... 35 
Serial Port Interface (SPI).............................................................. 39 
Hardware Interface..................................................................... 40 
Memory Map .................................................................................. 41 
Reading the Memory Map Table.............................................. 41 
Reserved Locations .................................................................... 41 
Default Values ............................................................................. 41 
Logic Levels................................................................................. 41 
Applications Information .............................................................. 45 
Power and Ground Recommendations ................................... 45 
Exposed Paddle Thermal Heat Slug Recommendations ...... 45 
Outline Dimensions ....................................................................... 46 
Ordering Guide .......................................................................... 46 
Rev. 0 | Page 2 of 48





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