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Gate Drivers. FAN3224 Datasheet

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Gate Drivers. FAN3224 Datasheet
















FAN3224 Drivers. Datasheet pdf. Equivalent













Part

FAN3224

Description

(FAN3223 - FAN3225) Low-Side Gate Drivers



Feature


FAN3223 / FAN3224 / FAN3225 — Dual 4A High-Speed, Low-Side Gate Drivers May 2008 FAN3223 / FAN3224 / FAN3225 Dual 4A High-Speed, Low-Side Gate Drivers Fe atures ƒ ƒ ƒ ƒ ƒ ƒ Industry-Stand ard Pinouts 4.5 to 18V Operating Range 5A Peak Sink/Source at VDD = 12V 4.3A S ink / 2.8A Source at VOUT = 6V Choice o f TTL or CMOS Input Thresholds Three Ve rsions of Dual Independent.
Manufacture

Fairchild Semiconductor

Datasheet
Download FAN3224 Datasheet


Fairchild Semiconductor FAN3224

FAN3224; Drivers: Description The FAN3223-25 fa mily of dual 4A gate drivers is designe d to drive N-channel enhancement-mode M OSFETs in low-side switching applicatio ns by providing high peak current pulse s during the short switching intervals. The driver is available with either TT L or CMOS input thresholds. Internal ci rcuitry provides an under-voltage locko ut function by hol.


Fairchild Semiconductor FAN3224

ding the output LOW until the supply vol tage is within the operating range. In addition, the drivers feature matched i nternal propagation delays between A an d B channels for applications requiring dual gate drives with critical timing, such as synchronous rectifiers. This a lso enables connecting two drivers in p arallel to effectively double the curre nt capability driv.


Fairchild Semiconductor FAN3224

ing a single MOSFET. The FAN322X drivers incorporate MillerDrive™ architectur e for the final output stage. This bipo larMOSFET combination provides high cur rent during the Miller plateau stage of the MOSFET turn-on / turn-off process to minimize switching loss, while provi ding railto-rail voltage swing and reve rse current capability. The FAN3223 off ers two inverting dr.




Part

FAN3224

Description

(FAN3223 - FAN3225) Low-Side Gate Drivers



Feature


FAN3223 / FAN3224 / FAN3225 — Dual 4A High-Speed, Low-Side Gate Drivers May 2008 FAN3223 / FAN3224 / FAN3225 Dual 4A High-Speed, Low-Side Gate Drivers Fe atures ƒ ƒ ƒ ƒ ƒ ƒ Industry-Stand ard Pinouts 4.5 to 18V Operating Range 5A Peak Sink/Source at VDD = 12V 4.3A S ink / 2.8A Source at VOUT = 6V Choice o f TTL or CMOS Input Thresholds Three Ve rsions of Dual Independent.
Manufacture

Fairchild Semiconductor

Datasheet
Download FAN3224 Datasheet




 FAN3224
May 2008
FAN3223 / FAN3224 / FAN3225
Dual 4A High-Speed, Low-Side Gate Drivers
Features
ƒ Industry-Standard Pinouts
ƒ 4.5 to 18V Operating Range
ƒ 5A Peak Sink/Source at VDD = 12V
ƒ 4.3A Sink / 2.8A Source at VOUT = 6V
ƒ Choice of TTL or CMOS Input Thresholds
ƒ Three Versions of Dual Independent Drivers:
- Dual Inverting + Enable (FAN3223)
- Dual Non-Inverting + Enable (FAN3224)
- Dual-Inputs (FAN3225)
ƒ Internal Resistors Turn Driver Off If No Inputs
ƒ MillerDrive™ Technology
ƒ 12ns / 9ns Typical Rise/Fall Times with 2.2nF Load
ƒ Typical Propagation Delay Under 20ns Matched
within 1ns to the Other Channel
ƒ Double Current Capability by Paralleling Channels
ƒ 8-Lead 3x3mm MLP or 8-Lead SOIC Package
ƒ Rated from –40°C to +125°C Ambient
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ƒ Switch-Mode Power Supplies
ƒ High-Efficiency MOSFET Switching
ƒ Synchronous Rectifier Circuits
ƒ DC-to-DC Converters
ƒ Motor Control
Description
The FAN3223-25 family of dual 4A gate drivers is
designed to drive N-channel enhancement-mode
MOSFETs in low-side switching applications by
providing high peak current pulses during the short
switching intervals. The driver is available with either
TTL or CMOS input thresholds. Internal circuitry
provides an under-voltage lockout function by holding
the output LOW until the supply voltage is within the
operating range. In addition, the drivers feature
matched internal propagation delays between A and B
channels for applications requiring dual gate drives with
critical timing, such as synchronous rectifiers. This also
enables connecting two drivers in parallel to effectively
double the current capability driving a single MOSFET.
The FAN322X drivers incorporate MillerDrive™
architecture for the final output stage. This bipolar-
MOSFET combination provides high current during the
Miller plateau stage of the MOSFET turn-on / turn-off
process to minimize switching loss, while providing rail-
to-rail voltage swing and reverse current capability.
The FAN3223 offers two inverting drivers and the
FAN3224 offers two non-inverting drivers. Each device
has dual independent enable pins that default to ON if
not connected. In the FAN3225, each channel has dual
inputs of opposite polarity, which allows configuration
as non-inverting or inverting with an optional enable
function using the second input. If one or both inputs
are left unconnected, internal resistors bias the inputs
such that the output is pulled LOW to hold the power
MOSFET OFF.
FAN3223
© 2007 Fairchild Semiconductor Corporation
FAN3223 / FAN3224 / FAN3225 • Rev. 1.0.5
FAN3224
Figure 1. Pin Configurations
FAN3225
www.fairchildsemi.com




 FAN3224
Ordering Information
Part Number
Logic
Input
Threshold
Package
FAN3223CMPX
FAN3223CMX
FAN3223TMPX
Dual Inverting Channels + Dual Enable
FAN3223TMX
FAN3224CMPX
FAN3224CMX Dual Non-Inverting Channels + Dual
FAN3224TMPX Enable
FAN3224TMX
FAN3225CMPX
FAN3225CMX Dual Channels of Two-Input / One-
FAN3225TMPX Output Drivers
FAN3225TMX
CMOS
TTL
CMOS
TTL
CMOS
TTL
3x3mm MLP-8
SOIC-8
3x3mm MLP-8
SOIC-8
3x3mm MLP-8
SOIC-8
3x3mm MLP-8
SOIC-8
3x3mm MLP-8
SOIC-8
3x3mm MLP-8
SOIC-8
Packing Quantity
Method per Reel
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
3,000
2,500
3,000
2,500
3,000
2,500
3,000
2,500
3,000
2,500
3,000
2,500
All standard Fairchild Semiconductor products are RoHS compliant and many are also “GREEN” or going green. For Fairchild’s
definition of “green” please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
Package Outlines
Figure 2. 3x3mm MLP-8 (Top View)
Figure 3. SOIC-8 (Top View)
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Thermal
Characteristics(1)
Package
ΘJL(2) ΘJT(3) ΘJA(4) ΨJB(5) ΨJT(6) Units
8-Lead 3x3mm Molded Leadless Package (MLP)
1.2 64 42 2.8 0.7 °C/W
8-Pin Small Outline Integrated Circuit (SOIC)
38 29 87 41 2.3 °C/W
Notes:
1. Estimates derived from thermal simulation; actual values depend on the application.
2. Theta_JL (ΘJL): Thermal resistance between the semiconductor junction and the bottom surface of all the leads (including any
thermal pad) that are typically soldered to a PCB.
3. Theta_JT (ΘJT): Thermal resistance between the semiconductor junction and the top surface of the package, assuming it is
held at a uniform temperature by a top-side heatsink.
4. Theta_JA (ΘJA): Thermal resistance between junction and ambient, dependent on the PCB design, heat sinking, and airflow.
The value given is for natural convection with no heatsink, as specified in JEDEC standards JESD51-2, JESD51-5, and
JESD51-7, as appropriate.
5. Psi_JB (ΨJB): Thermal characterization parameter providing correlation between semiconductor junction temperature and an
application circuit board reference point for the thermal environment defined in Note 4. For the MLP-8 package, the board
reference is defined as the PCB copper connected to the thermal pad and protruding from either end of the package. For the
SOIC-8 package, the board reference is defined as the PCB copper adjacent to pin 6.
6. Psi_JT (ΨJT): Thermal characterization parameter providing correlation between the semiconductor junction temperature and
the center of the top of the package for the thermal environment defined in Note 4.
© 2007 Fairchild Semiconductor Corporation
FAN3223 / FAN3224 / FAN3225 • Rev. 1.0.5
2
www.fairchildsemi.com




 FAN3224
FAN3223
FAN3224
Figure 4. Pin Assignments (Repeated)
FAN3225
Pin Definitions
Name
Pin Description
ENA
Enable Input for Channel A. Pull pin LOW to inhibit driver A. ENA has TTL thresholds for both TTL and
CMOS INx threshold.
ENB
Enable Input for Channel B. Pull pin LOW to inhibit driver B. ENB has TTL thresholds for both TTL and
CMOS INx threshold.
GND Ground. Common ground reference for input and output circuits.
INA Input to Channel A.
INA+ Non-Inverting Input to Channel A. Connect to VDD to enable output.
INA- Inverting Input to Channel A. Connect to GND to enable output.
INB Input to Channel B.
INB+ Non-Inverting Input to Channel B. Connect to VDD to enable output.
INB- Inverting Input to Channel B. Connect to GND to enable output.
OUTA Gate Drive Output A: Held LOW unless required input(s) are present and VDD is above UVLO threshold.
OUTB Gate Drive Output B: Held LOW unless required input(s) are present and VDD is above UVLO threshold.
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Gate Drive Output A (inverted
above UVLO threshold.
from
the
input):
Held
LOW
unless
required
input
is
present
and
VDD
is
OUTB
Gate Drive Output B (inverted from the input): Held LOW unless required input is present and VDD is
above UVLO threshold.
P1
Thermal Pad (MLP only). Exposed metal on the bottom of the package; may be left floating or connected
to GND; NOT suitable for carrying current.
VDD Supply Voltage. Provides power to the IC.
Output Logic
FAN3223 (x=A or B)
FAN3224 (x=A or B)
ENx
INx OUTx
ENx
0 00
0 1(7) 0
1(7) 0 1
1(7) 1(7) 0
0
0
1(7)
1(7)
Note:
7. Default input signal if no external connection is made.
INx
0(7)
1
0(7)
1
OUTx
0
0
0
1
© 2007 Fairchild Semiconductor Corporation
FAN3223 / FAN3224 / FAN3225 • Rev. 1.0.5
3
FAN3225 (x=A or B)
INx+
0(7)
0(7)
1
1
INx
0
1(7)
0
1(7)
OUTx
0
0
1
0
www.fairchildsemi.com




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