DatasheetsPDF.com

CY7C1163V18 Datasheet, Equivalent, Burst Architecture.

(CY7C11xxV18) SRAM 4-Word Burst Architecture

(CY7C11xxV18) SRAM 4-Word Burst Architecture

 

 

 

Part CY7C1163V18
Description (CY7C11xxV18) SRAM 4-Word Burst Architecture
Feature CY7C1161V18 CY7C1176V18 CY7C1163V18 CY7C 1165V18 18-Mbit QDR™-II+ SRAM 4-Word Burst Architecture (2.
5 Cycle Read Lat ency) Features ■ Functional Descript ion The CY7C1161V18, CY7C1176V18, CY7C1 163V18, and CY7C1165V18 are 1.
8V Synchr onous Pipelined SRAMs equipped with QDR ™-II+ architecture.
QDR-II+ architect ure consists of two separate ports to a ccess the memory array.
The read port h as dedicated data outputs to support re ad operations and the write port has de dicated data inputs to support write op erations.
QDR-II+ architecture has sepa rate data inputs and data outputs to co mpletely eliminate t .
Manufacture Cypress Semiconductor
Datasheet
Download CY7C1163V18 Datasheet
Part CY7C1163V18
Description (CY7C11xxV18) SRAM 4-Word Burst Architecture
Feature CY7C1161V18 CY7C1176V18 CY7C1163V18 CY7C 1165V18 18-Mbit QDR™-II+ SRAM 4-Word Burst Architecture (2.
5 Cycle Read Lat ency) Features ■ Functional Descript ion The CY7C1161V18, CY7C1176V18, CY7C1 163V18, and CY7C1165V18 are 1.
8V Synchr onous Pipelined SRAMs equipped with QDR ™-II+ architecture.
QDR-II+ architect ure consists of two separate ports to a ccess the memory array.
The read port h as dedicated data outputs to support re ad operations and the write port has de dicated data inputs to support write op erations.
QDR-II+ architecture has sepa rate data inputs and data outputs to co mpletely eliminate t .
Manufacture Cypress Semiconductor
Datasheet
Download CY7C1163V18 Datasheet

CY7C1163V18

CY7C1163V18
CY7C1163V18

CY7C1163V18

Recommended third-party CY7C1163V18 Datasheet

 

 

@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)