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UPD6326C. D6326C Datasheet

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UPD6326C. D6326C Datasheet






D6326C UPD6326C. Datasheet pdf. Equivalent




D6326C UPD6326C. Datasheet pdf. Equivalent





Part

D6326C

Description

UPD6326C



Feature


DATA SHEET MOS INTEGRATED CIRCUIT µPD 6325, µPD6326, µPD6335, µPD6336 QUAD /OCTAL 6BIT D/A CONVERTER CMOS LSI DES CRIPTION µPD6325 Serise are 6 bit D/A Converter for control volumn, brightnes s, contrast, color or tone of TV set. T he data are transferring serially from micro-computer. µPD6325 Serise Line-up D/A output is consist of Emitter follo wer buffer Non buffer ou.
Manufacture

NEC

Datasheet
Download D6326C Datasheet


NEC D6326C

D6326C; tput QUAD D/A OCTAL D/A µPD6325C, 6325 G µPD6335C, 6335G µPD6326C µPD6336C FEATURES • R-2R ladder D/A • Seri al Data input (DATA IN, CLOCK, LOAD) Power supply voltage of interface is 5 V (VCC) and D/A reference voltage is free (VCC to 15 V). ORDERING INFORMATI ON Part No. Package 16-pin plastic DIP (300 mil) 16-pin plastic SOP (300 mil) 16-pin plastic DIP (300 mil).


NEC D6326C

16-pin plastic DIP (300 mil) 16-pin pla stic SOP (300 mil) 16-pin plastic DIP ( 300 mil) µPD6325C µPD6325G µPD6326C µPD6335C www.DataSheet4U.com µPD6335 G µPD6336C PIN CONNECTION DIAGRAM (To p View) µ PD6325, µPD6335 VCC DATA IN N.C. CLOCK LOAD N.C. DATA OUT VSS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 µ PD6326, µPD6336 VCC DATA IN CLOCK LOAD OPTION1 DATA OUT DA8 VSS 1 .


NEC D6326C

2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VD D DA1 DA2 DA3 DA4 N.C. OPTION1 OPTION2 VDD DA1 DA2 DA3 DA4 DA5 DA6 DA7 Docum ent No. G10654EJ6V0DS00 (6th edition) D ate Published November 1997 N Printed i n Japan © 1995 µPD6325, µPD6326, µPD6335, µPD6336 BLOCK DIAGRAM VCC V CC CLOCK DATA IN LOAD Level Shifter LSB D0 D1 D2 12 bit Shift Resister D3 D4 D 5 D6 D7 D8 MSB D9 D10 D.

Part

D6326C

Description

UPD6326C



Feature


DATA SHEET MOS INTEGRATED CIRCUIT µPD 6325, µPD6326, µPD6335, µPD6336 QUAD /OCTAL 6BIT D/A CONVERTER CMOS LSI DES CRIPTION µPD6325 Serise are 6 bit D/A Converter for control volumn, brightnes s, contrast, color or tone of TV set. T he data are transferring serially from micro-computer. µPD6325 Serise Line-up D/A output is consist of Emitter follo wer buffer Non buffer ou.
Manufacture

NEC

Datasheet
Download D6326C Datasheet




 D6326C
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD6325, µPD6326, µPD6335, µPD6336
QUAD/OCTAL 6BIT D/A CONVERTER
CMOS LSI
DESCRIPTION
µPD6325 Serise are 6 bit D/A Converter for control volumn, brightness, contrast, color or tone of TV set.
The data are transferring serially from micro-computer.
µPD6325 Serise Line-up
D/A output is consist of Emitter follower buffer
Non buffer output
QUAD D/A
µPD6325C, 6325G
µPD6335C, 6335G
OCTAL D/A
µPD6326C
µPD6336C
FEATURES
• R-2R ladder D/A
• Serial Data input (DATA IN, CLOCK, LOAD)
• Power supply voltage of interface is 5 V (VCC) and D/A reference voltage is free (VCC to 15 V).
ORDERING INFORMATION
Part No.
µPD6325C
µPD6325G
µPD6326C
µPD6335C
www.DataSheet4U.cµoPmD6335G
µPD6336C
Package
16-pin plastic DIP (300 mil)
16-pin plastic SOP (300 mil)
16-pin plastic DIP (300 mil)
16-pin plastic DIP (300 mil)
16-pin plastic SOP (300 mil)
16-pin plastic DIP (300 mil)
PIN CONNECTION DIAGRAM (Top View)
µPD6325, µPD6335
VCC 1
DATA IN 2
N.C. 3
CLOCK 4
LOAD 5
N.C. 6
DATA OUT 7
VSS 8
16 VDD
15 DA1
14 DA2
13 DA3
12 DA4
11 N.C.
10 OPTION1
9 OPTION2
µPD6326, µPD6336
VCC 1
DATA IN 2
CLOCK 3
LOAD 4
OPTION1 5
DATA OUT 6
DA8 7
VSS 8
16 VDD
15 DA1
14 DA2
13 DA3
12 DA4
11 DA5
10 DA6
9 DA7
Document No. G10654EJ6V0DS00 (6th edition)
Date Published November 1997 N
Printed in Japan
© 1995




 D6326C
µPD6325, µPD6326, µPD6335, µPD6336
BLOCK DIAGRAM
VCC
CLOCK
DATA IN
LOAD
Level Shifter
LSB 12 bit Shift Resister MSB
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11
Line Decoder
VCC
Latch
DATA OUT
OPTION2
OPTION1
Level Shifter
6 bit Latch
VDD
VCC
VSS 6 bit R-2R ladder
D/A Converter
VDD
6 bit Latch
6 bit R-2R ladder
D/A Converter
VDD
www.DataSheet4U.com
AB
V
DA1
*A ------ µ PD6335, µ PD6336
B ------ µ PD6325,µ PD6326
AB
V
DA8
µPD6325, µPD6326 have Quad D/As.
2




 D6326C
µPD6325, µPD6326, µPD6335, µPD6336
PIN CONFIGURATION
Pin No.
6325
6326
µPD
µPD
6335
6336
Symbol
Pin Name
1 1 VCC Interface Power Supply
2 2 DATA IN Serial Data Input
4
3
CLOCK
Shift Clock Input
5
4
LOAD
Load Pulse Input
7
8
9
10
12
www.DataSheet4U.co1m3
14
15
16
6 DATA OUT Serial Data Output
8 VSS Ground
– OPTION2 Expantion Output Port
5 OPTION1 Expanttion Output Port
7 DA8 Analog Output Channel 8
9 DA7 Analog Output Channel 7
10 DA6 Analog Output Channel 6
11 DA5 Analog Output Channel 5
12 DA4 Analog Output Channel 4
13 DA3 Analog Output Channel 3
14 DA2 Analog Output Channel 2
15 DA1 Analog Output Channel 1
16 VDD Power Supply
Function
This pin is used to interface with the control IC
(ex. micro processor). Supply the voltage high
level of the control IC.
Control data input terminal. Data is read in syn-
chronization with the clocks input to the CLOCK
terminal.
Data read clock input terminal. The Data input
to the DATA IN terminal is read at the leading
edge of the clock.
This terminal is used to input Load signals after
inputting serial data. 12 bit data is read after
leading edge of a pulse input to the LOAD terminal.
Serial data output terminal. The final stage data
of 12 bit shift register appeares on this terminal
in synchronization with shift clock.
System ground.
D7 the data of the shift register appears on this
terminal. (Only µPD6325 and µPD6335)
D6 the data of the shift register appears on this
terminal.
Analog Output
Analog Output
Analog Output
Analog Output
Analog Output
Analog Output
Analog Output
Analog Output
Reference Voltage for D/A converters. Analog
output voltage range is GND to VDD.
3



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