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Burst PSRAM. M36P0R9060E0 Datasheet |
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M36P0R9060E0
512 Mbit (x16, Multiple Bank, Multi-Level, Burst) Flash memory
64 Mbit (Burst) PSRAM, 1.8V supply, Multi-Chip Package
Feature summary
■ Multi-Chip Package
– 1 die of 512 Mbit (32Mb x 16, Multiple
Bank, Multi-Level, Burst) Flash memory
– 1 die of 64 Mbit (4Mb x16) PSRAM
■ Supply voltage
– VDDF = VCCP = VDDQ = 1.7 to 1.95V
– VPPF = 9V for fast program
■ Electronic signature
– Manufacturer Code: 20h
– Device Code: 8819
■ ECOPACK® package
Flash memory
■ Synchronous / asynchronous read
– Synchronous Burst Read mode:
108MHz, 66MHz
– Asynchronous Page Read mode
– Random Access: 96ns
■ Programming time
– 4.2µs typical Word program time using
Buffer Enhanced Factory Program
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■ Memory organization
– Multiple Bank memory array: 64 Mbit banks
– Four Extended Flash Array (EFA) Blocks of
64 Kbits
■ Dual operations
– program/erase in one Bank while read in
others
– No delay between read and write
operations
■ Security
– 64 bit unique device number
– 2112 bit user programmable OTP Cells
■ 100,000 Program/erase cycles per block
■ Common Flash Interface (CFI)
FBGA
TFBGA107 (ZAC)
■ Block locking
– All Blocks locked at power-up
– Any combination of Blocks can be locked
with zero latency
– WPF for Block Lock-Down
– Absolute Write Protection with VPPF = VSS
PSRAM
■ User-selectable operating modes
– Asynchronous modes: Random Read, and
Write, Page Read
– Synchronous modes: NOR-Flash, Full
Synchronous (Burst Read and Write)
■ Asynchronous Random Read
– Access time: 70ns
■ Asynchronous Page Read
– Page size: 4, 8 or 16 Words
– Subsequent Read within Page: 20ns
■ Burst Read
– Fixed length (4, 8, 16 or 32 Words) or
Continuous
■ Low power consumption
– Active current: < 25mA
– Standby current: 140µA
– Deep Power-Down current: < 10µA
■ Low-power features
– Partial Array Self-Refresh (PASR)
– Deep Power-Down (DPD) Mode
– Automatic Temperature-compensated Self-
Refresh
November 2007
Rev. 3
1/23
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Contents
M36P0R9060E0
1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1 Address inputs (A0-A24) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 Data input/output (DQ0-DQ15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Latch Enable (L) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Clock (K) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.5 Wait (WAIT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.6
2.7
2.8
2.9
2.10
2.11
2.12
2.13
2.14
2.15
2.16
2.17
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2.18
2.19
2.20
2.21
2.22
Flash Chip Enable input (EF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Flash Output Enable inputs (GF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Flash Write Enable (WF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Flash Write Protect (WPF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Flash Reset (RPF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
PSRAM Chip Enable input (EP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PSRAM Write Enable (WP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PSRAM Output Enable (GP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PSRAM Upper Byte Enable (UBP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PSRAM Lower Byte Enable (LBP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PSRAM Configuration Register Enable (CRP) . . . . . . . . . . . . . . . . . . . . . 11
Deep Power-Down input (DPDF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
VDDF Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
VCCP Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
VDDQ Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
VPPF Program Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
VSS Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
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