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MOS TRANSISTOR. STE26N50 Datasheet

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MOS TRANSISTOR. STE26N50 Datasheet






STE26N50 TRANSISTOR. Datasheet pdf. Equivalent




STE26N50 TRANSISTOR. Datasheet pdf. Equivalent





Part

STE26N50

Description

N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR



Feature


www.DataSheet4U.com STE26N50 N - CHANNE L ENHANCEMENT MODE POWER MOS TRANSISTOR IN ISOTOP PACKAGE TYPE STE26N50 s s V DSS 500 V R DS( on) < 0.2 Ω ID 26 A 4 3 s s s s s s s HIGH CURRENT P OWER MODULE AVALANCHE RUGGED TECHNOLOGY (SEE IRFP450 FOR RATING) VERY LARGE SO A - LARGE PEAK POWER CAPABILITY EASY TO MOUNT SAME CURRENT CAPABILITY FOR THE TWO SOURCE TERMINALS.
Manufacture

STMicroelectronics

Datasheet
Download STE26N50 Datasheet


STMicroelectronics STE26N50

STE26N50; EXTREMELY LOW Rth JUNCTION TO CASE VERY LOW DRAIN TO CASE CAPACITANCE VERY LOW INTERNAL PARASITIC INDUCTANCE (TYPICAL LY < 5 nH) ISOLATED PACKAGE UL RECOGNIZ ED (FILE No E81743) 1 2 ISOTOP INTER NAL SCHEMATIC DIAGRAM INDUSTRIAL APPLI CATIONS: SMPS & UPS s MOTOR CONTROL s W ELDING EQUIPMENT s OUTPUT STAGE FOR PWM , ULTRASONIC CIRCUITS s ABSOLUTE MAXIM UM RATINGS Symbol .


STMicroelectronics STE26N50

VD S V DG R V GS ID ID ID M( •) P tot T stg Tj V ISO Parameter Drain-Source V oltage (V GS = 0) Drain-Gate Voltage (R GS = 20 k Ω ) Gate-Source Voltage Dra in Current (continuous) at T c = 25 C D rain Current (continuous) at T c = 100 C Drain Current (pulsed) Total Dissipat ion at Tc = 25 o C Derating Factor Stor age Temperature Max. Operating Junction Temperature Insulatio.


STMicroelectronics STE26N50

n Withstand Voltage (AC-RMS) o o Value 500 500 ± 20 26 17 104 300 2.4 -55 to 150 150 2500 Unit V V V A A A W W/o C o o C C V (•) Pulse width limited by safe operating area July 1993 1/8 www.DataSheet4U.com STE26N50 THERMAL DATA R thj-cas e R thc-h Thermal Resist ance Junction-case Thermal Resistance C ase-heatsink With Conductive Grease App lied Max Max 0.42 0.0.

Part

STE26N50

Description

N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR



Feature


www.DataSheet4U.com STE26N50 N - CHANNE L ENHANCEMENT MODE POWER MOS TRANSISTOR IN ISOTOP PACKAGE TYPE STE26N50 s s V DSS 500 V R DS( on) < 0.2 Ω ID 26 A 4 3 s s s s s s s HIGH CURRENT P OWER MODULE AVALANCHE RUGGED TECHNOLOGY (SEE IRFP450 FOR RATING) VERY LARGE SO A - LARGE PEAK POWER CAPABILITY EASY TO MOUNT SAME CURRENT CAPABILITY FOR THE TWO SOURCE TERMINALS.
Manufacture

STMicroelectronics

Datasheet
Download STE26N50 Datasheet




 STE26N50
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STE26N50
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTOR IN ISOTOP PACKAGE
TYPE
STE26N50
VDSS
500 V
R DS( on)
< 0.2
ID
26 A
s HIGH CURRENT POWER MODULE
s AVALANCHE RUGGED TECHNOLOGY
(SEE IRFP450 FOR RATING)
s VERY LARGE SOA - LARGE PEAK POWER
CAPABILITY
s EASY TO MOUNT
s SAME CURRENT CAPABILITY FOR THE
TWO SOURCE TERMINALS
s EXTREMELY LOW Rth JUNCTION TO CASE
s VERY LOW DRAIN TO CASE CAPACITANCE
s VERY LOW INTERNAL PARASITIC
INDUCTANCE (TYPICALLY < 5 nH)
s ISOLATED PACKAGE UL RECOGNIZED
(FILE No E81743)
INDUSTRIAL APPLICATIONS:
s SMPS & UPS
s MOTOR CONTROL
s WELDING EQUIPMENT
s OUTPUT STAGE FOR PWM, ULTRASONIC
CIRCUITS
1
2
4
3
ISOTOP
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
P ar amete r
VD S Drain-Source Voltage (VGS = 0)
VDG R Drain-Gate Voltage (RGS = 20 k)
VGS Gate-Source Voltage
ID Drain Current (continuous) at T c = 25 oC
ID Drain Current (continuous) at T c = 100 oC
IDM() Drain Current (pulsed)
Ptot Total Dissipation at Tc = 25 oC
Derating Factor
Tstg Storage Temperature
Tj Max. Operating Junction Temperature
VISO Insulation Withstand Voltage (AC-RMS)
() Pulse width limited by safe operating area
July 1993
Value
500
500
± 20
26
17
104
300
2.4
-55 to 150
150
2500
Unit
V
V
V
A
A
A
W
W /o C
oC
oC
V
1/8




 STE26N50
STE26N50
www.DataSheet4U.com
THERMAL DATA
Rthj-case Thermal Resistance Junction-case
Rthc-h Thermal Resistance Case-heatsink With Conductive
Grease Applied
Max
Max
0.42
0.05
oC/ W
oC/ W
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)
OFF
Symb ol
Parameter
Test Conditions
V(BR)DSS Drain-source
Breakdown Voltage
ID = 1 mA VGS = 0 V
IDSS
Zero Gate Voltage
VDS = Max Rating
Drain Current (VGS = 0) VDS = Max Rating x 0.8 Tc = 125 oC
IG SS
Gate-body Leakage
Current (VD S = 0)
VGS = ± 20 V
Min.
500
Typ.
Max.
Unit
V
200
1
± 200
µA
mA
nA
ON ()
Symb ol
VG S(th)
RDS(on)
Parameter
Test Conditions
Gate Threshold Voltage VDS = VGS ID = 1 mA
Static Drain-source On VGS = 10V ID = 13 A
R esist anc e
Min.
2
Typ.
Max.
4
0.2
Unit
V
DYNAMIC
Symb ol
gfs ()
Ciss
Coss
Crss
Parameter
Forward
Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
Test Conditions
VDS = 15 V ID = 13 A
Min.
12
Typ.
Max.
Unit
S
VDS = 25 V f = 1 MHz VG S = 0 V
6
1200
500
nF
pF
pF
SWITCHING ON
Symb ol
td(on)
tr
(di/ d t) o n
Qg
Parameter
Turn-on Time
Rise Time
Turn-on Current Slope
Total Gate Charge
Test Conditions
VDD = 250 V ID = 13 A
RG = 4.7
VGS = 10 V
(see test circuit, figure 1)
VDD = 400 V ID = 26 A
RG = 4.7
VGS = 10 V
(see test circuit, figure 3)
VDD = 400 V
VGS = 10 V
ID = 26 A
Min.
Typ.
60
80
Max.
Unit
ns
ns
450 A/µs
275 nC
2/8




 STE26N50
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING OFF
Symb ol
tr(Vof f)
tf
tc
Parameter
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Conditions
VDD = 400 V ID = 26 A
RG = 4.7
VGS = 10 V
(see test circuit, figure 3)
SOURCE DRAIN DIODE
Symb ol
Parameter
Test Conditions
IS D
I SDM()
Source-drain Current
Source-drain Current
(pulsed)
VSD () Forward On Voltage
ISD = 26 A VGS = 0
trr Reverse Recovery
Time
Qrr Reverse Recovery
ISD = 26 A
di/dt = 100 A/µs
VDD = 100 V Tj = 150 oC
(see test circuit, figure 3)
Charge
IRRM Reverse Recovery
Current
() Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
() Pulse width limited by safe operating area
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STE26N50
Min.
Typ.
63
25
85
Max.
Unit
ns
ns
ns
Min.
Typ.
Max.
26
104
Unit
A
A
850
23.5
55
1.4
V
ns
µC
A
Safe Operating Area
Thermal Impedance
3/8






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