CY7C1522V18 CY7C1529V18 CY7C1523V18 CY7C1524V18
72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
Features
72-Mbit density (8M x 8, 8M x 9, 4M x 18, 2M x 36) 300-MHz clock for high bandwidth 2-Word burst for reducing address bus frequency Double Data Rate (DDR) interfaces (data transferred at 600 MHz) @ 300 MHz Two input clocks (K and K) for preci...
