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MIMO MAC/BB/Radio. AR9220 Datasheet

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MIMO MAC/BB/Radio. AR9220 Datasheet






AR9220 MAC/BB/Radio. Datasheet pdf. Equivalent




AR9220 MAC/BB/Radio. Datasheet pdf. Equivalent





Part

AR9220

Description

Single-Chip 2x2 MIMO MAC/BB/Radio



Feature


Data Sheet October 2009 AR9220 Single-C hip 2x2 MIMO MAC/BB/Radio with PCI Inte rface for 802.11n 2.4 and 5 GHz WLANs G eneral Description The Atheros AR9220 i s a highly integrated single-chip solut ion for 2.4 and 5 GHz 802.11nready wire less local area networks (WLANs) that e nables high-performance 2x2 MIMO config urations for wireless station applicati ons demanding robu.
Manufacture

Atheros

Datasheet
Download AR9220 Datasheet


Atheros AR9220

AR9220; st link quality and maximum throughput a nd range. The AR9220 integrates a multi -protocol MAC, baseband processor, anal og-to-digital and digital-to-analog (AD C/ DAC) converters, 2x2 MIMO radio tran sceiver, and PCI interface in an all-CM OS device for low power and small form factor applications. The AR9220 impleme nts half-duplex OFDM, CCK, and DSSS bas eband processing, .


Atheros AR9220

supporting up to 130 Mbps for 20 MHz and 300 Mbps for 40 MHz channel operations respectively, and IEEE 802.11a/b/g dat a rates. Additional features include si gnal detection, automatic gain control, frequency offset estimation, symbol ti ming, and channel estimation. The AR922 0 MAC supports the 802.11 wireless MAC protocol, 802.11i security, receive and transmit filterin.


Atheros AR9220

g, error recovery, and quality of servic e (QoS). The AR9220 supports two simult aneous traffic streams using up to two integrated transmit chains and receive chains for high throughput and range pe rformance. Transmit chains combine base band in-phase (I) and quadrature (Q) si gnals, convert them to the desired freq uency, and drive the RF signal to multi ple antennas. The .

Part

AR9220

Description

Single-Chip 2x2 MIMO MAC/BB/Radio



Feature


Data Sheet October 2009 AR9220 Single-C hip 2x2 MIMO MAC/BB/Radio with PCI Inte rface for 802.11n 2.4 and 5 GHz WLANs G eneral Description The Atheros AR9220 i s a highly integrated single-chip solut ion for 2.4 and 5 GHz 802.11nready wire less local area networks (WLANs) that e nables high-performance 2x2 MIMO config urations for wireless station applicati ons demanding robu.
Manufacture

Atheros

Datasheet
Download AR9220 Datasheet




 AR9220
Data Sheet
October 2009
AR9220 Single-Chip 2x2 MIMO MAC/BB/Radio with PCI
Interface for 802.11n 2.4 and 5 GHz WLANs
General Description
The Atheros AR9220 is a highly integrated
single-chip solution for 2.4 and 5 GHz 802.11n-
ready wireless local area networks (WLANs) that
enables high-performance 2x2 MIMO
configurations for wireless station applications
demanding robust link quality and maximum
throughput and range. The AR9220 integrates a
multi-protocol MAC, baseband processor,
analog-to-digital and digital-to-analog (ADC/
DAC) converters, 2x2 MIMO radio transceiver,
and PCI interface in an all-CMOS device for low
power and small form factor applications.
The AR9220 implements half-duplex OFDM,
CCK, and DSSS baseband processing, supporting
up to 130 Mbps for 20 MHz and 300 Mbps for
40 MHz channel operations respectively, and
IEEE 802.11a/b/g data rates. Additional features
include signal detection, automatic gain control,
frequency offset estimation, symbol timing, and
channel estimation. The AR9220 MAC supports
the 802.11 wireless MAC protocol, 802.11i
security, receive and transmit filtering, error
recovery, and quality of service (QoS).
The AR9220 supports two simultaneous traffic
streams using up to two integrated transmit
chains and receive chains for high throughput
and range performance. Transmit chains combine
baseband in-phase (I) and quadrature (Q) signals,
convert them to the desired frequency, and drive
the RF signal to multiple antennas. The receiver
converts an RF signal to baseband I and Q
outputs. The frequency synthesizer supports
one-MHz steps to match frequencies defined by
IEEE 802.11a/b/g/n specifications.
The AR9220 supports frame data transfer to and
from the host using a PCI interface that provides
interrupt generation and reporting, power save,
and status reporting. Other external interfaces
include serial EEPROM and GPIOs. The AR9220
interoperates with standard legacy 802.11a/b/g
devices.
Features
Dynamic frequency selection (DFS) is
supported in 5-GHz bands
All-CMOS MIMO solution interoperable with
IEEE 802.11a/b/g/n WLANs
2x2 MIMO technology improves effective
throughput and range over existing
802.11a/b/g products
Supports spatial multiplexing, cyclic-delay
diversity (CDD), and maximal ratio
combining (MRC)
2.4/5 GHz WLAN MAC/BB processing
BPSK, QPSK, 16 QAM, 64 QAM, DBPSK,
DQPSK, and CCK modulation schemes
Data rates of up to 130 Mbps for 20 MHz
channels and 300 Mbps for 40 MHz channels
Wireless multimedia enhancements quality of
service support (QoS)
802.11e-compatible bursting
Support for IEEE 802.11e, h, and i standards
WEP, TKIP, and AES hardware encryption
20 and 40 MHz channelization
32-bit 0–33 and 66-MHz PCI 2.3 interface
Reduced (short) guard interval
Frame aggregation
Block ACK
IEEE 1149.1 standard test access port and
boundary scan architecture supported
337-pin, 12 mm x 12 mm BGA package
AR9220 System Block Diagram
2.4/5 GHz
2x2
Radio
Front-
End
Circuits
Rx Radio BB Filters
Tx Radio in/out MUX
Rx Radio BB Filters
Tx Radio in/out MUX
Frequency Synthesizers
Bias/Control
DAC
ADC
DAC
ADC
Baseband
AR9220
MAC/
Configuration
Control/
Memory
Host and
Peripheral
Interface
40 MHz
Crystal
PCI
Serial EEPROM
GPIOs
© 2000-2009 by Atheros Communications, Inc. All rights reserved. Atheros®, Atheros Driven®, Atheros XR®, Driving the Wireless Future®, ROCm®, Super
AG®, Super G®, Total 802.11n®, and Wake on Wireless® are registered by Atheros Communications, Inc. Atheros SST™, Signal-Sustain Technology™, the Air
is Cleaner at 5-GHz™, XSPAN™, Wireless Future. Unleashed Now.™, and 5-UP™ are trademarks of Atheros Communications, Inc. The Atheros logo is a
registered trademark of Atheros Communications, Inc. All other trademarks are the property of their respective holders. Subject to change without notice.
COMPANY CONFIDENTIAL
1
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 AR9220
2 • AR9220 Single-Chip 2x2 MIMO MAC/BB/Radio for 802.11n WLANs
2 October 2009
Atheros Communications, Inc.
COMPANY CONFIDENTIAL
Free Datasheet http://www.datasheet4u.com/




 AR9220
Table of Contents
General Description ........................................ 1
Features ............................................................ 1
AR9220 System Block Diagram .................... 1
1 Pin Descriptions ............................ 5
2 Functional Description ............... 13
2.1 Overview ................................................. 13
2.1.1 Configuration Block ................... 13
2.1.2 AR9220 Address MAP ............... 13
2.1.3 Serial EEPROM Interface ........... 14
2.1.4 EEPROM Auto-Sizing Mechanism
14
2.1.5 EEPROM Read/Write Protection
Mechanism ................................... 14
2.2 Reset ......................................................... 14
2.3 GPIO ........................................................ 14
2.4 LED .......................................................... 14
2.5 PCI Host Interface .................................. 14
2.5.1 PCI Registers ............................... 15
2.6 Signal Description .................................. 15
2.7 Host Interface Unit Interrupts .............. 15
3 Medium Access Control (MAC) 17
3.1 Overview ................................................. 17
3.2 Descriptor ................................................ 17
3.3 Descriptor Format .................................. 18
3.4 Queue Control Unit (QCU) .................. 31
3.4.1 DCF Control Unit (DCU) ........... 31
3.5 Protocol Control Unit (PCU) ................ 31
4 Digital PHY Block ....................... 33
4.1 Overview ................................................. 33
4.2 802.11n (MIMO) Mode .......................... 33
4.2.1 Transmitter (Tx) .......................... 33
4.2.2 Receiver (Rx) ............................... 33
4.3 802.11 a/b/g Legacy Mode .................. 34
4.3.1 Transmitter .................................. 34
4.3.2 Receiver ........................................ 34
5 Radio Block .................................. 35
5.1 Receiver (Rx) Block ................................ 35
5.2 Transmitter (Tx) Block .......................... 36
5.3 Synthesizer (SYNTH) Block ................. 37
5.4 Bias/Control (BIAS) Block ................... 37
6 Register Descriptions ..................39
6.1 Host PCI Configuration Space Registers
39
6.1.1 Vendor ID .................................... 40
6.1.2 Device ID ..................................... 40
6.1.3 Command .................................... 40
6.1.4 Status ............................................ 41
6.1.5 Revision ID .................................. 42
6.1.6 Class Code ................................... 42
6.1.7 Cache Line Size ........................... 42
6.1.8 Latency Timer ............................. 42
6.1.9 Header Type ................................ 43
6.1.10 Base Address ............................... 43
6.1.11 Subsystem Vendor ID ................ 43
6.1.12 Subsystem ID .............................. 43
6.1.13 Capabilities Pointer (CAP_PTR) 44
6.1.14 Interrupt Line (INT_LINE) ....... 44
6.1.15 Interrupt Pin (INT_PIN) ............ 44
6.1.16 MinGnt ......................................... 44
6.1.17 MaxLat ......................................... 44
6.2 AR9220 Internal Register Descriptions 45
6.2.1 General DMA and Rx-Related
Registers ....................................... 45
6.2.2 Beacon Handling ........................ 64
6.2.3 QCU Registers ............................. 66
6.2.4 DCU Registers ............................. 72
6.2.5 EEPROM Interface Registers .... 82
6.2.6 Host Interface Registers ............. 82
6.2.7 RTC Interface Registers ............. 92
6.2.8 MAC PCU Registers ................... 95
6.2.9 Ms Counter and Rx/Tx Latency
(MAC_PCU_USEC_LATENCY) 99
7 Electrical Characteristics ..........121
7.1 Absolute Maximum Ratings .............. 121
7.2 Recommended Operating Conditions 121
7.3 Radio Receiver Characteristics .......... 122
7.4 Radio Transmitter Characteristics ..... 125
Atheros Communications, Inc.
COMPANY CONFIDENTIAL
AR9220 Single-Chip 2x2 MIMO MAC/BB/Radio for 802.11n WLANs • 3
October 2009 3
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