Buck Controller. ADP3208 Datasheet

ADP3208 Controller. Datasheet pdf. Equivalent

Part ADP3208
Description Synchronous Buck Controller
Feature 7-Bit, Programmable, Dual-Phase, Mobile, CPU, Synchronous Buck Controller ADP3208 FEATURES Single-ch.
Manufacture ON Semiconductor
Datasheet
Download ADP3208 Datasheet



ADP3208
7-Bit, Programmable, Dual-Phase, Mobile,
CPU, Synchronous Buck Controller
ADP3208
FEATURES
Single-chip solution
Fully compatible with the Intel® IMVP-6+™ specifications
Integrated MOSFET drivers
Selectable 1- or 2-phase operation with up to 1 MHz per
phase switching frequency
Guaranteed ±8 mV worst-case differentially sensed core
voltage error over temperature
Automatic power-saving mode maximizes efficiency with
light load during deeper sleep operation
Soft transient control reduces inrush current and audio noise
Active current balancing between output phases
Independent current limit and load line setting inputs for
additional design flexibility
Built-in power-good blanking supports
voltage identification (VID) on-the-fly transients
7-bit, digitally programmable DAC with 0.3 V to 1.5 V output
Short-circuit protection with programmable latch-off delay
Clock enable output delays the CPU clock until the core
voltage is stable
Output power or current monitor options
48-lead LFCSP
APPLICATIONS
Notebook power supplies for next-generation Intel processors
GENERAL DESCRIPTION
The ADP3208 is a highly efficient, multiphase, synchronous
buck switching regulator controller. With its integrated drivers,
the ADP3208 is optimized for converting the notebook battery
voltage into the core supply voltage required by high performance
Intel processors. An internal 7-bit DAC is used to read a VID code
directly from the processor and to set the CPU core voltage to a
value within the range of 0.3 V to 1.5 V. The phase relationship
of the output signals ensures interleaved 2-phase operation.
The ADP3208 uses a multimode architecture run at a program-
mable switching frequency and optimized for efficiency depending
on the output current requirement. The ADP3208 switches
between single- and dual-phase operation to maximize efficiency
with all load conditions. The chip includes a programmable load
line slope function to adjust the output voltage as a function of the
load current so that the core voltage is always optimally positioned
for a load transient. The ADP3208 also provides accurate and
reliable short-circuit protection, adjustable current limiting, and
a delayed power-good output. The IC supports on-the-fly output
voltage changes requested by the CPU.
The ADP3208 is specified over the extended commercial tempera-
ture range of 0°C to 100°C and is available in a 48-lead LFCSP.
FUNCTIONAL BLOCK DIAGRAM
RAMP VRPM RPM RT
SP
PSI
VID6, VID5,
VID4, VID3,
VID2, VID1,
VID0
ST
VARFREQ
DPRSTP
DPRSLP
SS
PWRGD
PGDELAY
CLKEN
EN
VCC
GND
RAMP
GENER-
ATOR
OSCILLATOR
PWM
CMPS
PWM
LATCH
PHASE
CONTROL
DRV2
IN
OD2
VREF
SWITCH
AMPS
VID
DAC
VDAC
REFER-
ENCE
SELECT
FBRTN
CLREF
PSI
HOUSE-
KEEPING
CLTHSEL
OVTH
UVTH
REFTH BIAS
DRV1
IN
OD1B
OD1A
+
+
ERR AMP ++––
CSAMP
CLIM
CMP
+
+
SS
+–
+–
UVLO
REF BIAS
ADP3208
VREF PMON
PWM
CSAVG
+
PMON PMONFS
VCC
BST2
DRVH2
SW2
PVCC2
DRVL2
PGND2
BST1
DRVH1
SW1
PVCC1
DRVL1
PGND1
COMP
FB
LLINE
CSCOMP
CSSUM
CSREF
CLIM
VRTT
TTSNS
FBRTN
©2007 SCILLC. All rights reserved.
December 2007 – Rev. 1
Figure 1.
Publication Order Number:
ADP3208/D



ADP3208
ADP3208
TABLE OF CONTENTS
Features...............................................................................................1
Applications .......................................................................................1
General Description..........................................................................1
Functional Block Diagram...............................................................1
Revision History................................................................................2
Specifications .....................................................................................3
Timing Diagram................................................................................7
Absolute Maximum Ratings ............................................................8
ESD Caution ..................................................................................8
Pin Configuration and Function Descriptions .............................9
Test Circuits .....................................................................................11
Typical Performance Characteristics............................................12
Theory of Operation.......................................................................15
Number of Phases .......................................................................15
Operation Modes ........................................................................15
Differential Sensing of Output Voltage ....................................18
Output Current Sensing .............................................................18
Active Impedance Control Mode .............................................18
Current Control Mode and Thermal Balance.........................19
Voltage Control Mode ................................................................19
Power-Good Monitoring ...........................................................19
Power-Up Sequence and Soft Start ...........................................19
Soft Transient...............................................................................20
Current Limit, Short-Circuit, and Latch-Off Protection.......21
Changing VID on the Fly...........................................................21
Output Crowbar ..........................................................................23
REVISION HISTORY
12/07- Rev 1: Conversion to ON Semiconductor
9/07—Rev. Sp0 to Rev. SpA
Changes to Absolute Maximum Ratings........................................8
Change to Table 3 ..............................................................................9
Change to Power Monitor Function Section...............................24
Changes to Ordering Guide...........................................................38
10/06—Revision Sp0: Initial Version
Reverse Voltage Protection........................................................23
Output Enable and UVLO.........................................................23
Thermal Throttling Control......................................................23
Power Monitor Function ...........................................................24
Application Information ................................................................27
Setting the Clock Frequency for PWM....................................27
Setting the Switching Frequency for
RPM Operation of Phase 1 ........................................................27
Soft Start and Current Limit Latch-Off Delay Times ............27
PWRGD Delay Timer ................................................................28
Inductor Selection.......................................................................28
COUT Selection..............................................................................30
Power MOSFETs .........................................................................31
Ramp Resistor Selection ............................................................32
COMP Pin Ramp ........................................................................32
Current Limit Setpoint...............................................................32
Power Monitor ............................................................................33
Feedback Loop Compensation Design ....................................33
CIN Selection and Input Current di/dt Reduction ..................34
Soft Transient Setting .................................................................34
Selecting Thermal Monitor Components................................34
Tuning Procedure for ADP3208 ...............................................35
Layout and Component Placement..........................................36
Outline Dimension .........................................................................38
Ordering Guide ...........................................................................38
Rev. 1 | Page 2 of 38 | www.onsemi.com





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